Alternatives and similar repositories for IPECC

Users that are interested in IPECC are comparing it to the libraries listed below

• lowRISC / ot-sca
  Side-channel analysis setup for OpenTitan
  ☆35Updated last month
• ANSSI-FR / SecAESSTM32
  Bibliothèque C et assembleur permettant le chiffrement/déchiffrement AES-128 de messages pour des composants grand public (famille STM32F…
  ☆69Updated 2 years ago
• scluconn / LPN-based_PUF
  FPGA implementation of a cryptographically secure physical unclonable function based on learning parity with noise problem.
  ☆15Updated 7 years ago
• 0xADE1A1DE / Rosita
  ☆17Updated 2 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆10Updated 5 years ago
• isec-tugraz / ascon_hardware
  Hardware implementations of the authenticated encryption design ASCON
  ☆19Updated 7 years ago
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆32Updated this week
• secworks / trng
  True Random Number Generator core implemented in Verilog.
  ☆75Updated 4 years ago
• secworks / blake2s
  Verilog implementation of the 32-bit version of the Blake2 hash function
  ☆21Updated 3 months ago
• Chair-for-Security-Engineering / AES_masked_BRAM
  Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)
  ☆16Updated 4 years ago
• isec-tugraz / memsec
  Framework for building transparent memory encryption and authentication solutions
  ☆27Updated 7 years ago
• hyperpicc / ecc
  Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)
  ☆21Updated 7 years ago
• rprimas / ascon-verilog
  Hardware Design of Ascon
  ☆23Updated 3 weeks ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆36Updated 4 years ago
• simple-crypto / SCALib
  Side-Channel Analysis Library
  ☆94Updated last week
• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆26Updated last year
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆93Updated 2 years ago
• secworks / modexp
  Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.
  ☆17Updated 4 years ago
• sca-research / ELMO
  ☆51Updated last year
• scluconn / DA_PUF_Library
  Defense/Attack PUF Library (DA PUF Library)
  ☆50Updated 5 years ago
• Ko- / riscvcrypto
  Optimized assembly implementations of crypto for the RV32I (RISC-V) architecture
  ☆31Updated 4 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago
• simple-crypto / SMAesH
  Masked Hardware AES with HPC
  ☆13Updated 8 months ago
• J08nY / pyecsca
  Python Elliptic Curve Side-Channel Analysis toolkit.
  ☆61Updated 2 weeks ago
• ascon / ascon-hardware-sca
  NIST LWC Hardware Design of Ascon with Protection against Power Side-Channel Attacks
  ☆17Updated 2 years ago
• raymondrc / riscv-isa-extension-for-SM4
  RISC-V instruction set extensions for SM4 block cipher
  ☆20Updated 5 years ago
• ileanabuhan / Tutorial-on-entropies
  An interactive notebook for understanding the relation between mutual information, perceived and hypothetical information
  ☆11Updated 5 years ago
• kudelskisecurity / Verilaptor
  ☆20Updated 3 years ago
• siamumar / BIST_PUF_TRNG
  A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators
  ☆23Updated 7 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆18Updated 6 years ago