Alternatives and similar repositories for TangPrimer-20K-example:

Users that are interested in TangPrimer-20K-example are comparing it to the libraries listed below

• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆254Updated 2 months ago
• sipeed / TangMega-138KPro-example
  Tang Mega 138K Pro examples
  ☆68Updated 3 months ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆123Updated 3 years ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆293Updated this week
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆194Updated 10 months ago
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆229Updated 2 years ago
• WangXuan95 / FPGA-SDcard-Reader
  An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。
  ☆290Updated last year
• lekgolo167 / enxor-logic-analyzer
  FPGA Logic Analyzer and GUI
  ☆120Updated 2 years ago
• sipeed / TangNano-9K-example
  TangNano-9K-example project
  ☆258Updated 11 months ago
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆277Updated last year
• damdoy / ice40_ultraplus_examples
  Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
  ☆260Updated last year
• jamieiles / uart
  Verilog UART
  ☆148Updated 11 years ago
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆171Updated 5 years ago
• sipeed / TangNano-20K-example
  TangNano-20K-example
  ☆111Updated last year
• ataradov / riscv
  Verilog implementation of a RISC-V core
  ☆109Updated 6 years ago
• verimake-team / SparkRoad-V
  ☆62Updated 2 months ago
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆426Updated 3 years ago
• wuxx / Colorlight-FPGA-Projects
  current focus on Colorlight i5 and i9 & i9plus module
  ☆287Updated 5 months ago
• hell03end / verilog-uart
  Simple 8-bit UART realization on Verilog HDL.
  ☆101Updated 10 months ago
• AngeloJacobo / FPGA_OV7670_Camera_Interface
  Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps
  ☆59Updated 3 years ago
• freecores / 8051
  8051 core
  ☆103Updated 10 years ago
• xiaowuzxc / SparrowRV
  An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.
  ☆60Updated 2 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆65Updated 7 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆68Updated 3 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆198Updated 7 months ago
• WangXuan95 / FPGA-DDR-SDRAM
  An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
  ☆170Updated last year
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆127Updated 5 years ago
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆153Updated last year
• lushaylabs / tangnano9k-series-examples
  Examples for the Lushay Labs tang nano 9k series
  ☆104Updated 9 months ago
• WangXuan95 / FPGA-UART
  This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块：UART接收器、UART发送器、UART转AXI4交互式调…
  ☆171Updated last year