sipeed / TangPrimer-20K-example

Related projects: ⓘ

• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆169Updated 4 months ago
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆184Updated last week
• sipeed / TangNano-9K-example
  TangNano-9K-example project
  ☆214Updated 5 months ago
• verimake-team / SparkRoad-V
  ☆60Updated 6 months ago
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆161Updated 4 years ago
• sipeed / TangMega-138KPro-example
  Tang Mega 138K Pro examples
  ☆47Updated last month
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆206Updated last year
• xiaowuzxc / SparrowRV
  An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.
  ☆51Updated last year
• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆247Updated last year
• WangXuan95 / FPGA-SDcard-Reader
  An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器，可以从FAT16或FAT32格式的SD卡中读取文件。
  ☆247Updated last year
• damdoy / ice40_ultraplus_examples
  Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
  ☆241Updated 7 months ago
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆140Updated 9 months ago
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆344Updated 2 years ago
• freecores / 8051
  8051 core
  ☆92Updated 10 years ago
• projf / display_controller
  FPGA display controller with support for VGA, DVI, and HDMI.
  ☆205Updated 4 years ago
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆119Updated 5 years ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆95Updated 2 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆66Updated 3 years ago
• WangXuan95 / FPGA-DDR-SDRAM
  An AXI4-based DDR1 controller to realize mass, cheap memory for FPGA. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。
  ☆134Updated last year
• XUANTIE-RV / opene902
  OpenXuantie - OpenE902 Core
  ☆129Updated 2 months ago
• tastynoob / ritter-soc
  a 4-pipeline riscv soc ( included core, periph), based with rv32im ,designed by verilog
  ☆20Updated last year
• WangXuan95 / FPGA-CAN
  An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。
  ☆203Updated last year
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆157Updated last month
• wuxx / icesugar
  iCESugar FPGA Board (base on iCE40UP5k)
  ☆354Updated 3 months ago
• lizhirui / AXI-SDCard-High-Speed-Controller
  A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)
  ☆104Updated 2 years ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆174Updated 2 weeks ago
• jakubcabal / spi-fpga
  SPI master and SPI slave for FPGA written in VHDL
  ☆162Updated 3 years ago
• wuxx / Colorlight-FPGA-Projects
  current focus on Colorlight i5 and i9 & i9plus module
  ☆250Updated 7 months ago
• lushaylabs / tangnano9k-series-examples
  Examples for the Lushay Labs tang nano 9k series
  ☆82Updated 3 months ago
• hell03end / verilog-uart
  Simple 8-bit UART realization on Verilog HDL.
  ☆75Updated 4 months ago