fpga-logi / logi-pong-chu-examples
example code for the logi-boards from pong chu HDL book
☆27Updated 9 years ago
Alternatives and similar repositories for logi-pong-chu-examples
Users that are interested in logi-pong-chu-examples are comparing it to the libraries listed below
Sorting:
- All Logi specific HDL code (platform specific interface, extension boards, specific hdl, etc)☆31Updated 9 years ago
- This repository contains synthesizable examples which use the PoC-Library.☆37Updated 4 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆35Updated 4 years ago
- Wishbone interconnect utilities☆41Updated 3 months ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 6 years ago
- SPI Master and Slave components to be used in all of FPGAs, written in VHDL.☆37Updated 5 years ago
- RMII Firewall FPGA☆23Updated 5 years ago
- ☆37Updated 4 years ago
- Digital Design Labs☆24Updated 6 years ago
- Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL☆36Updated 6 years ago
- Asynchronous FIFO for FPGAs☆11Updated 7 years ago
- A simple I2C minion in VHDL☆60Updated 5 years ago
- ☆45Updated last year
- Small (Q)SPI flash memory programmer in Verilog☆62Updated 2 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆80Updated 2 years ago
- JESD204B core for Migen/MiSoC☆36Updated 4 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Tester for IS61WV5128BLL-10BLI SRAM in Cmod A7-35T☆18Updated 6 years ago
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆34Updated 7 years ago
- Extensible FPGA control platform☆61Updated 2 years ago
- SPI Master Core clone from OpenCores☆11Updated 11 years ago
- VHDL PCIe Transceiver☆28Updated 4 years ago
- Summer School Week 1 & 2 repo☆11Updated 2 years ago
- A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen☆19Updated 10 years ago
- A CIC filter implemented in Verilog☆22Updated 9 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 2 months ago
- VHDL Library for implementing common DSP functionality.☆27Updated 6 years ago
- Collection of projects for various FPGA development boards☆44Updated last year
- Eclipse based IDE for RISC-V bare metal software development.☆18Updated 5 years ago
- RISC-V 32-bit core for MCCI Catena 4710☆10Updated 5 years ago