Alternatives and similar repositories for Hacky-Racer

Users that are interested in Hacky-Racer are comparing it to the libraries listed below

• vusec / tlbdr
  ☆17Updated 3 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆22Updated 4 years ago
• renxida / iseedeaduops-poc
  Proof-of-concept for I See Dead Micro-Ops transient execution attack
  ☆14Updated 4 years ago
• libtea / frameworks
  Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
  ☆62Updated 3 years ago
• flowyroll / uarchsec
  ☆47Updated 6 years ago
• vernamlab / medusa
  Medusa Repository: Transynther tool and Medusa Attack
  ☆19Updated 5 years ago
• flowyroll / medusa
  Medusa Repository: Transynther tool and Medusa Attack
  ☆23Updated 5 years ago
• CPU-Security / Spectre-V4-ng
  The code in this project demonstrates 2 novel Spectre-V4 attacks, named as out-of-place Spectre-STL and Spectre-CTL, based on the Specula…
  ☆22Updated 2 years ago
• yshalabi / covert-channel-tutorial
  Hands on with side-channels: a tutorial on covert-channels built using shared CPU resources. Three different covert-channel implementatio…
  ☆50Updated 6 years ago
• KULeuven-COSIC / PRIME-SCOPE
  The open-source component of Prime+Scope, published at CCS 2021
  ☆36Updated 2 years ago
• dskarlatos / MicroScope
  Microscope: Enabling Microarchitectural Replay Attacks
  ☆20Updated 5 years ago
• FPSG-UIUC / Peek-a-Walk
  Proof-of-concept code for the IEEE S&P 2025 paper "Peek-a-Walk: Leaking Secrets via Page Walk Side Channels"
  ☆30Updated 5 months ago
• cgvwzq / evsets
  Tool for testing and finding minimal eviction sets
  ☆107Updated 4 years ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆30Updated 3 years ago
• bu-icsg / PHMon
  This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).
  ☆27Updated 5 years ago
• nepoche / Flush-Reload
  A flush-reload side channel attack implementation
  ☆55Updated 3 years ago
• greenlsi / reload_refresh
  Reload+Refresh PoC
  ☆16Updated 5 years ago
• zzrcxb / LLCFeasible
  Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)
  ☆33Updated 8 months ago
• pierreay / reproduce-spectre-gem5
  Repository of the paper "Reproducing Spectre Attack with gem5, How To Do It Right?"
  ☆18Updated 2 years ago
• 0xADE1A1DE / Mastik
  ☆117Updated 3 years ago
• TwinVisor / twinvisor-prototype
  ☆22Updated 3 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆28Updated 5 years ago
• vul337 / cfi-eval
  ☆22Updated 5 years ago
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆23Updated 3 years ago
• cispa / BranchDifferent
  Implementation for the DIMVA'22 paper "Branch Different - Spectre Attacks on Apple Silicon"
  ☆37Updated 3 years ago
• Compass-All / CCS22-StrongBox
  ☆34Updated 3 years ago
• ECLab-ITU / Cache-Side-Channel-Attacks
  This repository contains source code and experimental data of multiple cache side-channel attacks on Intel x86 architecture.
  ☆58Updated 6 years ago
• OleksiiOleksenko / SpecFuzz
  A tool for detecting Spectre vulnerabilities through fuzzing
  ☆45Updated 4 years ago
• Miro-H / CacheSC
  Library for Prime+Probe cache side-channel attacks on L1 and L2
  ☆37Updated 5 years ago
• sectrs-acai / acai
  Protecting Accelerator Execution with Arm Confidential Computing Architecture (USENIX Security 2024)
  ☆26Updated 2 years ago