☆10Jan 30, 2019Updated 7 years ago
Alternatives and similar repositories for TAGE_BranchPredictor
Users that are interested in TAGE_BranchPredictor are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SystemVerilog implemention of the TAGE branch predictor☆15May 26, 2021Updated 5 years ago
- Verilog Implementation of TAGE based predictor by Andre Seznec and Pierre Michaud☆22May 7, 2018Updated 8 years ago
- Implemented gshare, tournament, perceptron branch predictors along with a combination of gshare and tournament☆13Feb 13, 2018Updated 8 years ago
- Implementation of TAGE Branch Predictor - currently considered state of the art☆56Sep 6, 2014Updated 12 years ago
- Branch predictor simulation, analysis, and Python compatibility for the 5th Championship Branch Prediction in 2016 (CBP-16)☆22Mar 9, 2023Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- "aura" my super-scalar O3 cpu core☆27May 25, 2024Updated 2 years ago
- Verification IP for Watchdog☆13Apr 6, 2021Updated 5 years ago
- 乱序双发处理器，在2024年计算机系统能力大赛CPU赛道（龙芯杯）获二等奖，全国第四☆24Aug 20, 2024Updated 2 years ago
- TCAM (Ternary Content-Addressable Memory) in Verilog☆59Oct 9, 2023Updated 3 years ago
- Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation☆14Nov 28, 2019Updated 6 years ago
- Computer organization lab source for 2025☆10Jun 10, 2025Updated last year
- Verilog program☆16Jul 27, 2020Updated 6 years ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Binary Content Addressable Memory (II-2D-BCAM)☆17Nov 10, 2024Updated last year
- Design consists of a 32-bit MIPS superscalar pipeline processor in functional Verilog. Runs a cache based memory system, a branch predict…☆14Oct 9, 2017Updated 9 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Python script to manage Questa/Modelsim simulations☆14Jan 2, 2014Updated 12 years ago
- RISC-V AI Accelerator SoC with innovative BitNet multiplier-free architecture. Features PicoRV32 CPU, dual AI accelerators (6.4 GOPS), an…☆13Jan 20, 2026Updated 9 months ago
- HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs☆13Feb 9, 2019Updated 7 years ago
- A python parser for decoding arm aarch32 and aarch64 system registers☆26Mar 29, 2026Updated 7 months ago
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆23Nov 10, 2024Updated last year
- Instruction Pointer Classifier and Dynamic Degree Stream based Hardware Cache Prefetching☆16Nov 16, 2019Updated 6 years ago
- ☆12Jun 20, 2023Updated 3 years ago
- AES crypto engine written in System Verilog and emulated on the Mentor Veloce. First place winner of Mentor Graphics Need For Speed Emula…☆18Mar 22, 2017Updated 9 years ago
- ☆19Jun 24, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ASIC simulation of Multi-ported Memory Module. And it can offer SRAM-based dual-port basic building block to support multiple read/write …☆25May 30, 2016Updated 10 years ago
- ☆16Aug 6, 2022Updated 4 years ago
- Port of Adafruit's si5351 driver to STM32 HAL☆11Jan 24, 2017Updated 9 years ago
- a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier☆29Mar 11, 2022Updated 4 years ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)☆23Nov 10, 2024Updated last year
- A MIPS processor with Cache and Advanced Branch Predictor written in SystemVerilog☆11Dec 26, 2020Updated 5 years ago
- ETH Computer Architecture - Fall 2020☆13Feb 26, 2021Updated 5 years ago
- FPGA implementation of an Apple//e (enhanced)☆16Mar 14, 2025Updated last year
- CPU simulator to showcase the speed improvement of prefetching instructions☆18Aug 16, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Builds and parses PCIe Transport Layer Packets (TLPs)☆45Jul 21, 2022Updated 4 years ago
- UVM candy lover testbench which uses YASA as simulation script☆17Apr 17, 2020Updated 6 years ago
- Source code repo for UVM Tutorial for Candy Lovers☆14Apr 23, 2017Updated 9 years ago
- 2024年电赛工程模板：基于正点原子F407ZGT6开发板 使用HAL库开发 内置多外设驱动和往年题用到的算法☆15Jul 28, 2024Updated 2 years ago
- The final project of NKU 2022 Computer Architecture. 南开大学2022体系结构大作业。☆10Sep 25, 2023Updated 3 years ago
- Compass Apache TVM is enhanced based on the Apache TVM for wide range of Neural Network (NN) models quick support, optimization and heter…☆21May 6, 2026Updated 5 months ago
- ☆35Jul 9, 2025Updated last year