mcjtag / tcamLinks
TCAM (Ternary Content-Addressable Memory) in Verilog
☆53Updated last year
Alternatives and similar repositories for tcam
Users that are interested in tcam are comparing it to the libraries listed below
Sorting:
- Verilog Content Addressable Memory Module☆107Updated 3 years ago
- ☆77Updated 10 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆42Updated 4 years ago
- An open-source Ternary Content Addressable Memory (TCAM) compiler.☆29Updated last year
- native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches☆44Updated 10 years ago
- Generic FIFO implementation with optional FWFT☆59Updated 5 years ago
- ☆62Updated 4 years ago
- General Purpose AXI Direct Memory Access☆55Updated last year
- PCI express simulation framework for Cocotb☆170Updated 3 months ago
- System-Veilog Packet Library to configure, randomize, pack/unpack, copy, compare/display different headers☆76Updated 6 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆58Updated last week
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆79Updated 7 years ago
- Ethernet interface modules for Cocotb☆68Updated last year
- Xilinx AXI VIP example of use☆41Updated 4 years ago
- Network on Chip Implementation written in SytemVerilog☆186Updated 2 years ago
- NVMe Controller featuring Hardware Acceleration☆90Updated 4 years ago
- Library defining all Ethernet packets in SystemVerilog and in SystemC☆37Updated 8 years ago
- AXI4 and AXI4-Lite interface definitions☆94Updated 4 years ago
- SystemVerilog modules and classes commonly used for verification☆50Updated 6 months ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆171Updated 8 months ago
- AXI4 BFM in Verilog☆32Updated 8 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆66Updated 5 years ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)☆24Updated 8 months ago
- Open source FPGA-based NIC and platform for in-network compute☆67Updated 9 months ago
- Ethernet switch implementation written in Verilog☆51Updated 2 years ago
- For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug☆60Updated 4 years ago
- Altera Advanced Synthesis Cookbook 11.0☆106Updated 2 years ago
- Verilog Ethernet Switch (layer 2)☆46Updated last year
- A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple mas…☆39Updated 2 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆67Updated 4 years ago