Alternatives and similar repositories for tcam

Users that are interested in tcam are comparing it to the libraries listed below

• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆113Updated 3 years ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆79Updated 11 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆43Updated 4 years ago
• merledu / OpenTCAM
  An open-source Ternary Content Addressable Memory (TCAM) compiler.
  ☆31Updated last year
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆84Updated 7 years ago
• sach / System-Verilog-Packet-Library
  System-Veilog Packet Library to configure, randomize, pack/unpack, copy, compare/display different headers
  ☆77Updated 6 years ago
• amiq-consulting / amiq_eth
  Library defining all Ethernet packets in SystemVerilog and in SystemC
  ☆38Updated 9 years ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆185Updated 3 months ago
• Xilinx / pcie_qdma_ats_example
  ☆26Updated 4 years ago
• shuckc / verilog-utils
  native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches
  ☆46Updated 11 years ago
• oprecomp / DDR4_controller
  ☆69Updated 4 years ago
• mcjtag / eth_switch
  Verilog Ethernet Switch (layer 2)
  ☆50Updated 2 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆54Updated 2 years ago
• taichi-ishitani / tnoc
  Network on Chip Implementation written in SytemVerilog
  ☆195Updated 3 years ago
• alexforencich / cocotbext-eth
  Ethernet interface modules for Cocotb
  ☆71Updated 3 months ago
• thinkoco / systemverilog-python
  Systemverilog DPI-C call Python function
  ☆26Updated 4 years ago
• Xilinx / open-nic-shell
  AMD OpenNIC Shell includes the HDL source files
  ☆134Updated 11 months ago
• thomasrussellmurphy / stx_cookbook
  Altera Advanced Synthesis Cookbook 11.0
  ☆111Updated 2 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆67Updated 3 months ago
• yhqiu16 / NVMeCHA
  NVMe Controller featuring Hardware Acceleration
  ☆99Updated 4 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆60Updated 5 years ago
• WilsonChen003 / HDLGen
  HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…
  ☆108Updated 2 years ago
• esynr3z / axi_vip_demo
  Xilinx AXI VIP example of use
  ☆42Updated 4 years ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆134Updated 4 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆97Updated 5 years ago
• luinaudt / deparser
  ☆16Updated 3 years ago
• pulp-platform / common_verification
  SystemVerilog modules and classes commonly used for verification
  ☆52Updated 2 weeks ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆59Updated 2 weeks ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆46Updated 2 years ago
• black-parrot-hdk / zynq-parrot
  BlackParrot on Zynq
  ☆47Updated last week