hVHDL / hVHDL_fixed_point
VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
☆22Updated last month
Alternatives and similar repositories for hVHDL_fixed_point:
Users that are interested in hVHDL_fixed_point are comparing it to the libraries listed below
- high level VHDL floating point library for synthesis in fpga☆16Updated last month
- An open-source HDL register code generator fast enough to run in real time.☆60Updated last week
- An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…☆27Updated 3 months ago
- IP Core Library - Published and maintained by the Open Source VHDL Group☆10Updated 2 weeks ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆23Updated 9 months ago
- cryptography ip-cores in vhdl / verilog☆40Updated 4 years ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 2 months ago
- A current mode buck converter on the SKY130 PDK☆27Updated 3 years ago
- ☆21Updated 2 weeks ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆34Updated last year
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆14Updated 2 years ago
- UART models for cocotb☆28Updated 2 years ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆16Updated 3 weeks ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆65Updated 7 months ago
- Library of reusable VHDL components☆28Updated last year
- Extensible FPGA control platform☆59Updated last year
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆55Updated this week
- Fixed-point math library with VHDL, Python and MATLAB support☆22Updated 2 months ago
- A Python package for generating HDL wrappers and top modules for HDL sources☆32Updated last month
- ☆33Updated last year
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆35Updated 2 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆39Updated last month
- mirror of https://git.elphel.com/Elphel/eddr3☆40Updated 7 years ago
- End-to-End Open-Source I2C GPIO Expander☆31Updated last month
- Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments☆54Updated last month
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆25Updated 2 months ago
- FPGA examples on Google Colab☆22Updated last year
- High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model☆23Updated 5 months ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year