VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and abc to dq transforms.
☆25Aug 27, 2026Updated this week
Alternatives and similar repositories for hVHDL_fixed_point
Users that are interested in hVHDL_fixed_point are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- high level VHDL floating point library for synthesis in fpga☆18Dec 18, 2025Updated 8 months ago
- Hardware Snappy decompressor☆12Sep 11, 2024Updated last year
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 10 years ago
- This is a project integrating HLS IP and CortexA9 on Zynq. This CPU-FPGA project, for a Matrix Multiplication Dataflow, is implemented wi…☆21Sep 3, 2019Updated 6 years ago
- VHDL library for synthesizable minimal gigabit ethernet with RGMII interface, minimal ethernet, ip and udp header parsers.☆19Nov 12, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Source files for Getting to Know Vivado course☆18Sep 2, 2020Updated 6 years ago
- Digital Circuit rendering engine☆40Jul 9, 2026Updated last month
- ☆28Mar 17, 2026Updated 5 months ago
- VHDL String Formatting Library☆27Apr 27, 2024Updated 2 years ago
- High-througput logic analyzer for FPGA☆17Oct 8, 2020Updated 5 years ago
- FPGA acceleration of arbitrary precision floating point computations.☆41May 17, 2022Updated 4 years ago
- CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules☆11Jan 17, 2022Updated 4 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 8 years ago
- STM32 Hiperface Encoder circuit and software☆11Nov 14, 2023Updated 2 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…☆30Jan 13, 2025Updated last year
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- A tube guitar amplifier power supply VHDL project☆17Nov 14, 2024Updated last year
- An example of how you can fully integrate wasm into a webpage. No need for fetching or any of that jazz.☆15Nov 6, 2020Updated 5 years ago
- The official repository of the local FPGA Development Kit.☆23Apr 30, 2019Updated 7 years ago
- Absolute encoder VHDL core☆21Feb 3, 2017Updated 9 years ago
- Exploring Shared Virtual Memory Abstractions in OpenCL Tools for FPGAs☆18Dec 7, 2017Updated 8 years ago
- Software, BSPs etc. for 5G wireless IP and PetaLinux☆20Dec 14, 2022Updated 3 years ago
- LCD capture for Rigol DS1074 using UVC on Cypress FX3☆15Oct 26, 2021Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated 2 years ago
- Making Lattice SensAI work properly on tinyVision products☆13Nov 22, 2022Updated 3 years ago
- DSP by FPGA☆15Sep 12, 2023Updated 2 years ago
- TCL framework to package Vivado IP-Cores☆13May 18, 2022Updated 4 years ago
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 5 years ago
- A plugin to allow Jenkins Steps with Cadence vManager API☆10Jan 15, 2026Updated 7 months ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated 2 years ago
- Floating-point matrix multiplication implementation (arbitrary precision)☆18Aug 3, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- FOC in FPGA implementation using MATLAB Simulink VDH code generation☆16Jul 3, 2020Updated 6 years ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆226Aug 25, 2026Updated last week
- OSVVM Documentation☆37Jul 30, 2026Updated last month
- Open-source IPs Package Manager (IPM)☆16Feb 24, 2025Updated last year
- PS/2 Keyboard IP written in VHDL for Xilinx FPGA☆17Jul 11, 2015Updated 11 years ago
- Verilog modules for software-defined radio.☆20Dec 31, 2012Updated 13 years ago
- A tool to generate optimized hardware files for univariate functions.☆30Apr 5, 2024Updated 2 years ago