RuokaiYin / MINT_QuantizationLinks
MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award
☆13Updated last year
Alternatives and similar repositories for MINT_Quantization
Users that are interested in MINT_Quantization are comparing it to the libraries listed below
Sorting:
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆27Updated 8 months ago
- Framework for radix encoded SNN on FPGA☆13Updated 3 years ago
- An energy simulation framework for BPTT-based SNN inference and training.☆16Updated last year
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- I will share some useful or interesting papers about neuromorphic processor☆25Updated 4 months ago
- SNN on FPGA☆10Updated 3 years ago
- ☆19Updated 4 years ago
- ☆17Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 5 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆13Updated last year
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆84Updated 3 years ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆11Updated 2 months ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆36Updated 4 years ago
- ☆18Updated 2 years ago
- bitfusion verilog implementation☆8Updated 3 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- This repository contains the models and training scripts used in the papers: "Quantizing Spiking Neural Networks with Integers" (ICONS 20…☆13Updated 4 years ago
- Hardware and software implementation of Sparsely-active SNNs☆14Updated 4 months ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆29Updated 4 months ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆56Updated 2 years ago
- ☆33Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆48Updated 4 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆26Updated 5 years ago
- CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL☆16Updated last year
- A nest brain simulator based on FPGA(LIF NEURON)☆14Updated 3 years ago
- Leaky Integrate and Fire (LIF) model implementation for FPGA☆65Updated last year
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆19Updated last year
- STBP is a way to train SNN with datasets by Backward propagation.Using this Repositories allows you to train SNNS with STBP and quantize …☆28Updated 3 years ago
- Stochastic Computing for Deep Neural Networks☆33Updated 4 years ago