freecores / bilinear_demosaic
Demosaic (Bilinear)
☆9Updated 10 years ago
Alternatives and similar repositories for bilinear_demosaic:
Users that are interested in bilinear_demosaic are comparing it to the libraries listed below
- WISHBONE DMA/Bridge IP Core☆18Updated 10 years ago
- We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.☆31Updated 5 years ago
- Pipelined FFT/IFFT 64 points processor☆12Updated 10 years ago
- NoC based MPSoC☆10Updated 10 years ago
- Microshift Compression: An Efficient Image Compression Algorithm for Hardware☆32Updated 3 years ago
- Verilog Code for a JPEG Decoder☆34Updated 7 years ago
- DDR3 SDRAM controller☆18Updated 10 years ago
- USB2.0 Verilog☆17Updated 5 years ago
- ☆14Updated last year
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆18Updated 2 years ago
- USB -> AXI Debug Bridge☆36Updated 3 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- kintex7 ov13850 fpga mipi camera☆18Updated last year
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 8 years ago
- Video Stream Scaler☆40Updated 10 years ago
- Reed Solomon Decoder (204,188)☆12Updated 10 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆34Updated 4 years ago
- 基于FPGA的FFT☆12Updated 6 years ago
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆16Updated 5 years ago
- MIPI CSI-2 RX☆31Updated 3 years ago
- This repo is for Edge Vision SoC framework, which facilitates quick porting of users' design for Edge AI and Vision solutions.☆22Updated last year
- Various low power labs using sky130☆11Updated 3 years ago
- SGMII☆12Updated 10 years ago
- ☆16Updated 5 years ago
- DSP WishBone Compatible Cores☆13Updated 10 years ago
- CORDIC VLSI-IP for deep learning activation functions☆14Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆36Updated 3 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Updated 9 years ago
- RTL code of some arbitration algorithm☆13Updated 5 years ago
- I2C Slave☆12Updated 10 years ago