freand76 / digsimLinks
An interactive digital logic simulator with verilog support (Yosys)
☆25Updated 2 weeks ago
Alternatives and similar repositories for digsim
Users that are interested in digsim are comparing it to the libraries listed below
Sorting:
- This repository contain source code for ngspice and ghdl integration☆33Updated 8 months ago
- Simulation VCD waveform viewer, using old Motif UI☆27Updated 2 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆29Updated 5 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Updated 3 years ago
- wavedrom to verilog converter☆16Updated 4 years ago
- IRSIM switch-level simulator for digital circuits☆34Updated 5 months ago
- FPGA Development toolset☆20Updated 8 years ago
- Digital Circuit rendering engine☆39Updated last month
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆20Updated last year
- CologneChip GateMate FPGA Module: GMM-7550☆22Updated last week
- Small footprint and configurable Inter-Chip communication cores☆61Updated 2 months ago
- Soft USB for LiteX☆50Updated 2 years ago
- Export netlists from Yosys to DigitalJS☆51Updated last month
- ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 archite…☆77Updated 2 years ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆66Updated last week
- XCircuit circuit drawing and schematic capture tool☆124Updated 5 months ago
- ☆16Updated last year
- Free open source EDA tools☆66Updated 5 years ago
- EDA Tools: Xilinx ISE 14.7 Dockerfile☆21Updated 3 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆18Updated 2 years ago
- ulx3s ghdl examples☆14Updated 4 years ago
- A graphical editor and event-driven simulator for digital circuits☆28Updated 3 years ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆23Updated 3 years ago
- ☆17Updated 4 months ago
- Python classes to create agnostic wave files for HDL simulator viewer☆12Updated 5 years ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆20Updated 3 years ago
- LiteX based FPGA gateware for Thunderscope.☆25Updated 2 weeks ago
- OpenSPARC-based SoC☆70Updated 11 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆32Updated 9 months ago
- ☆16Updated 3 years ago