Alternatives and similar repositories for creator

Users that are interested in creator are comparing it to the libraries listed below

• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆17Updated 3 years ago
• veripool / dinotrace
  Simulation VCD waveform viewer, using old Motif UI
  ☆28Updated 2 years ago
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆17Updated 10 months ago
• sparkfun / SparkFun_Red-V_Thing_Plus
  The SparkFun RED-V Thing Plus is a low-cost, development board featuring the Freedom E310 SoC which brings with it the RISC-V instruction…
  ☆13Updated 6 years ago
• laurelmay / riscv.vim
  RISC-V Assembly Syntax Highlighting for Vim
  ☆32Updated last year
• zeeshanrafique23 / RV32I-Logisim
  RV32I single cycle simulation on open-source software Logisim.
  ☆21Updated 3 years ago
• riscv-non-isa / riscv-external-debug-security
  The RISC-V External Debug Security Specification
  ☆20Updated 2 weeks ago
• riscv-mcu / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC. Tweaked for microcontrollers.
  ☆34Updated 2 months ago
• riscvarchive / riscv-dejagnu
  DejaGnu RISC-V port
  ☆13Updated 3 years ago
• XUANTIE-RV / buildroot
  Buildroot customized for Xuantie™ RISC-V CPU
  ☆47Updated 3 years ago
• jborza / emuriscv
  RISC-V emulator in C
  ☆33Updated 4 years ago
• openhwgroup / core-v-sw
  Main Repo for the OpenHW Group Software Task Group
  ☆17Updated 10 months ago
• freecores / freecores.github.io
  Freecores website
  ☆19Updated 9 years ago
• antmicro / virtex-ultrascale-pcie
  ☆17Updated 2 years ago
• varunnagpaal / Analog-Design-Modelling
  Analog Hardware Hands on Design Labs and Modelling using SPICE Tools (NI Multisim, LTSpice)
  ☆29Updated 7 years ago
• ultraembedded / librtos
  Very basic real time operating system for embedded systems...
  ☆16Updated 5 years ago
• riscvarchive / configuration-structure
  RISC-V Configuration Structure
  ☆41Updated last year
• kuznia-rdzeni / transactron
  Hardware transactions library for Amaranth
  ☆21Updated 2 months ago
• YoWASP / vscode
  YoWASP toolchain for Visual Studio Code
  ☆24Updated last month
• wavedrom / verilog
  wavedrom to verilog converter
  ☆17Updated 4 years ago
• litex-hub / zephyr-on-litex-vexriscv
  ☆15Updated 6 months ago
• polarfire-soc / meta-polarfire-soc-yocto-bsp
  This repository is no longer maintained and will be archived, please see https://github.com/linux4microchip/meta-mchp
  ☆58Updated 5 months ago
• riscv-admin / riscv-landscape
  🌄 RISC-V Ecosystem Landscape: a living document that developers, investors, vendors, researchers and others can use as a resource on the…
  ☆20Updated 3 weeks ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 4 years ago
• ZipCPU / qoiimg
  Quite OK image compression Verilog implementation
  ☆23Updated last year
• openrisc / or1k-gcc
  GCC port for OpenRISC 1000
  ☆26Updated 9 months ago
• TinyTapeout / tinytapeout-03
  ☆16Updated last year
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆95Updated 5 years ago
• TinyTapeout / tt02-submission-template
  Submission template for TT02
  ☆25Updated 2 years ago
• five-embeddev / riscv-scratchpad
  RISC-V Scratchpad
  ☆73Updated 3 years ago