Alternatives and similar repositories for elastic-ai.creator

Users that are interested in elastic-ai.creator are comparing it to the libraries listed below

• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆58Updated 3 years ago
• EEESlab / CMSIS_NN-INTQ
  INT-Q Extension of the CMSIS-NN library for ARM Cortex-M target
  ☆18Updated 5 years ago
• AlexMontgomerie / fpgaconvnet-hls
  ☆30Updated 7 months ago
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆94Updated 3 years ago
• EEESlab / CMix-NN
  CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices
  ☆43Updated 5 years ago
• ChFrenkel / ReckOn
  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
  ☆84Updated 3 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆198Updated this week
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆33Updated last year
• pulp-platform / pulp-trainlib
  Floating-Point Optimized On-Device Learning Library for the PULP Platform.
  ☆34Updated 3 weeks ago
• Fiwo735 / Transformer_Neural_Network_HLS
  ☆14Updated 2 years ago
• pulp-platform / dory
  A tool to deploy Deep Neural Networks on PULP-based SoC's
  ☆80Updated 3 months ago
• os-hxfan / BayesNN_FPGA
  FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
  ☆24Updated last year
• sefaburakokcu / finn-quantized-yolo
  Low-Precision YOLO on PYNQ with FINN
  ☆31Updated last year
• robertoBosio / NN2FPGA
  From Pytorch model to C++ for Vitis HLS
  ☆16Updated last week
• eml-eda / plinio
  A Plug-and-play Lightweight tool for the Inference Optimization of Deep Neural networks
  ☆41Updated this week
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆51Updated 7 years ago
• ChFrenkel / tinyODIN
  tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
  ☆56Updated 2 years ago
• hisrg / Neural-Network-Compression-and-Accelerator-on-Hardware
  My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …
  ☆51Updated 2 years ago
• MartaAndronic / NeuraLUT
  NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions
  ☆32Updated 2 months ago
• cjg91 / trans-fat
  An FPGA Accelerator for Transformer Inference
  ☆82Updated 3 years ago
• mlcommons / tiny_results_v0.7
  This repository contains the results and code for the MLPerf™ Tiny Inference v0.7 benchmark.
  ☆17Updated 2 years ago
• MartaAndronic / PolyLUT
  PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…
  ☆53Updated last year
• awai54st / LUTNet
  ☆58Updated 5 years ago
• GATECH-EIC / AutoDNNchip
  ☆71Updated 5 years ago
• neurosim / DNN_NeuroSim_V2.0
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆48Updated 4 years ago
• ehw-fit / tf-approximate
  Approximate layers - TensorFlow extension
  ☆27Updated last month
• sefaburakokcu / quantized-yolov5
  Low Precision(quantized) Yolov5
  ☆38Updated 2 months ago
• adamsolomou / SC-DNN
  Stochastic Computing for Deep Neural Networks
  ☆33Updated 4 years ago
• EEESlab / combinational-bnn
  System Verilog code describing a fully combinational binarized neural network.
  ☆34Updated 6 years ago
• snagiri / CSE237D-PYNQ-SNN-Accelerator
  Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board
  ☆36Updated 5 years ago