wavedrom / doppler

Related projects ⓘ

Alternatives and complementary repositories for doppler

• amiq-consulting / fc4sc
  A header only C++11 library for functional coverage
  ☆36Updated 2 years ago
• mschlaegl / pylibfst
  Handle Fast Signal Traces (fst) in Python
  ☆10Updated 2 years ago
• hdl / conda-eda
  Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
  ☆94Updated last week
• alexander-forster / cohdl
  A Python to VHDL compiler
  ☆15Updated 2 months ago
• alainmarcel / Surelog
  SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Li…
  ☆25Updated last month
• accellera-official / PySysC
  Public repository for PySysC, (From SC Common Practices Subgroup)
  ☆48Updated 10 months ago
• wyvernSemi / vproc
  Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments
  ☆47Updated last week
• pybfms / pybfms
  Provides automation scripts for building BFMs
  ☆16Updated 2 years ago
• fvutils / pyhdl-if
  Python interface for cross-calling with HDL
  ☆20Updated this week
• XedaHQ / xeda
  Cross EDA Abstraction and Automation
  ☆35Updated 2 weeks ago
• chipsalliance / UHDM-integration-tests
  ☆30Updated last year
• davidthings / hdelk
  Web-based HDL diagramming tool
  ☆73Updated last year
• VHDL / CoreLib
  A VHDL Core Library.
  ☆17Updated 7 years ago
• fvutils / pyucis
  Python API to Unified Coverage Interoperability Standard (UCIS) Data
  ☆21Updated last month
• jameshanlon / netlist-paths
  A library and command-line tool for querying a Verilog netlist.
  ☆26Updated 2 years ago
• Nic30 / pyDigitalWaveTools
  Python library for operations with VCD and other digital wave files
  ☆47Updated 5 months ago
• bavovanachte / sphinx-wavedrom
  A sphinx extension that allows including wavedrom diagrams by using its text-based representation
  ☆35Updated 2 months ago
• hgomersall / Ovenbird
  A tool for merging the MyHDL workflow with Vivado
  ☆19Updated 4 years ago
• tudortimi / ipxact
  IP-XACT XML binding library
  ☆14Updated 8 years ago
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆54Updated last year
• 0x01be / rudder
  Learn, share and collaborate on ASIC design using open tools and technologies
  ☆11Updated 3 years ago
• gsmecher / pyxsi
  Python/C/RTL cosimulation with Xilinx's xsim simulator
  ☆63Updated 2 months ago
• NJDFan / register-maps
  Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.
  ☆12Updated 2 years ago
• nobodywasishere / VHDLproc
  VHDLproc is a VHDL preprocessor
  ☆24Updated 2 years ago
• Nic30 / hdlConvertorAst
  Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator
  ☆31Updated 2 weeks ago
• VHDL / pyVHDLModel
  An abstract language model of VHDL written in Python.
  ☆50Updated this week
• dbhi / vboard
  Virtual development board for HDL design
  ☆39Updated last year
• wallento / wavedrompy
  WaveDrom compatible python command line
  ☆97Updated last year
• chipsalliance / python-fpga-interchange
  Python interface to FPGA interchange format
  ☆41Updated 2 years ago