Alternatives and similar repositories for SHA-256:

Users that are interested in SHA-256 are comparing it to the libraries listed below

• hadipourh / AES-VHDL
  VHDL Implementation of AES Algorithm
  ☆76Updated 3 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆32Updated 7 years ago
• ljhsiun2 / EllipticCurves_SystemVerilog
  Elgamal's over Elliptic Curves
  ☆19Updated 6 years ago
• mnasser431998 / bfu_dif_fft_rtl
  The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor
  ☆14Updated last year
• xfguo / tbgen
  Generate testbench for your verilog module.
  ☆37Updated 7 years ago
• pnvamshi / Hardware-Implementation-of-AES-Verilog
  Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog
  ☆39Updated 7 years ago
• thasti / fft
  synthesizable FFT IP block for FPGA designs
  ☆32Updated 5 years ago
• janschiefer / verilog_spi
  A simple Verilog SPI master / slave implementation featuring all 4 modes.
  ☆51Updated 4 years ago
• ttchisholm / 10g-low-latency-ethernet
  10G Low Latency Ethernet
  ☆48Updated last year
• akhan3 / async-fifo
  Asynchronous FIFO for transferring data between two asynchronous clock domains
  ☆16Updated 8 years ago
• AugustinJose1221 / FFTx32
  A 32 point radix-2 FFT module written in Verilog
  ☆22Updated 4 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆33Updated last month
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆60Updated 3 years ago
• esynr3z / axi_vip_demo
  Xilinx AXI VIP example of use
  ☆34Updated 3 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆17Updated 5 years ago
• hukenovs / fp23fftk
  Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
  ☆58Updated 2 years ago
• ATaylorCEngFIET / Mastering-MicroBlaze
  Slides and lab instructions for the mastering MicroBlaze session
  ☆35Updated 2 years ago
• ATaylorCEngFIET / introduction_to_vivado
  ☆20Updated 2 years ago
• jiacaiyuan / i2c_slave
  I2C slave Verilog Design and TestBench
  ☆21Updated 5 years ago
• Gabalo / RO_PUF
  Ring Oscillator Physically Unclonable Funtion
  ☆20Updated 3 years ago
• ahmad2smile / SHA256_Verilog
  Verilog based FPGA Design of SHA256 Simulated on ModelSim
  ☆22Updated 6 years ago
• nematoli / SPI-FPGA-VHDL
  SPI Master and Slave components to be used in all of FPGAs, written in VHDL.
  ☆35Updated 4 years ago
• zdszx / Modexpowering3
  a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
  ☆22Updated 3 years ago
• mongrelgem / Verilog-Adders
  Implementing Different Adder Structures in Verilog
  ☆64Updated 5 years ago
• ecelab-org / Split-Chip_authentication
  An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.
  ☆15Updated 5 years ago
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆39Updated last year
• Goshik92 / SHA256Hasher
  SHA-256 IP core for ZedBoard (Zynq SoC)
  ☆31Updated 6 years ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆49Updated last year
• lowRISC / ibex-demo-system
  A demo system for Ibex including debug support and some peripherals
  ☆62Updated 2 weeks ago
• siamumar / BIST_PUF_TRNG
  A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators
  ☆21Updated 7 years ago