ybai62868 / OpenCL_Xilinx-Intel_HeteroCLLinks
This is a repo which contains some details about how to use OpenCL backend (Xilinx/Intel).
☆25Updated 6 years ago
Alternatives and similar repositories for OpenCL_Xilinx-Intel_HeteroCL
Users that are interested in OpenCL_Xilinx-Intel_HeteroCL are comparing it to the libraries listed below
Sorting:
- Benchmark for matrix multiplications between dense and block sparse (BSR) matrix in TVM, blocksparse (Gray et al.) and cuSparse.☆23Updated 5 years ago
- Chameleon: Adaptive Code Optimization for Expedited Deep Neural Network Compilation☆27Updated 5 years ago
- ☆22Updated 8 months ago
- ☆19Updated 4 years ago
- An external memory allocator example for PyTorch.☆16Updated 2 months ago
- ☆36Updated 6 years ago
- ☆32Updated 4 years ago
- ☆14Updated last week
- Artifacts for SOSP'19 paper Optimizing Deep Learning Computation with Automatic Generation of Graph Substitutions☆21Updated 3 years ago
- ☆65Updated 4 years ago
- ☆23Updated 2 years ago
- GoldenEye is a functional simulator with fault injection capabilities for common and emerging numerical formats, implemented for the PyTo…☆26Updated 11 months ago
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 4 years ago
- ☆14Updated 4 years ago
- Official implementation of "Searching for Winograd-aware Quantized Networks" (MLSys'20)☆27Updated 2 years ago
- The code for our paper "Neural Architecture Search as Program Transformation Exploration"☆17Updated 4 years ago
- agile hardware-software co-design☆52Updated 3 years ago
- MobiSys#114☆22Updated 2 years ago
- This is the implementation for paper: AdaTune: Adaptive Tensor Program CompilationMade Efficient (NeurIPS 2020).☆14Updated 4 years ago
- EQueue Dialect☆39Updated 3 years ago
- PyTorch compilation tutorial covering TorchScript, torch.fx, and Slapo☆17Updated 2 years ago
- ☆21Updated 3 years ago
- My paper/code reading notes in Chinese☆46Updated 4 months ago
- ☆19Updated 5 years ago
- Public Release of Stream-Dataflow☆14Updated 6 years ago
- Code released to accompany the ISCA paper: "T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware"☆28Updated 3 years ago
- ☆19Updated 4 years ago
- Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices☆12Updated 4 years ago
- ☆29Updated 3 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 4 years ago