bytedance / emuMonitorLinks
emuMonitor is a tool for "palladium" and "zebu" usage information data-collection, data-analysis and data-display.
☆12Updated 8 months ago
Alternatives and similar repositories for emuMonitor
Users that are interested in emuMonitor are comparing it to the libraries listed below
Sorting:
- IFP (ic flow platform) is an integrated circuit design flow platform, mainly used for IC process specification management and data flow …☆181Updated 2 months ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆257Updated 2 weeks ago
- ☆184Updated last month
- Some useful documents of Synopsys☆79Updated 3 years ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆181Updated 5 years ago
- Verilog parser, preprocessor, and related tools for the Verilog-Perl package☆138Updated last year
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆104Updated 4 years ago
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆102Updated last year
- A Chisel RTL generator for network-on-chip interconnects☆207Updated 3 months ago
- ☆179Updated 5 months ago
- A Fast, Low-Overhead On-chip Network☆220Updated 2 weeks ago
- RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni☆128Updated 7 years ago
- GPGPU supporting RISCV-V, developed with verilog HDL☆106Updated 5 months ago
- An AXI4 crossbar implementation in SystemVerilog☆167Updated last month
- A dynamic verification library for Chisel.☆154Updated 9 months ago
- Network on Chip Simulator☆286Updated 3 weeks ago
- AMBA bus generator including AXI, AHB, and APB☆105Updated 4 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆214Updated 2 years ago
- reference block design for the ASAP7nm library in Cadence Innovus☆47Updated last year
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆206Updated 2 months ago
- Top project for RISC-V Matrix extension proposal and related opensource implementations.☆33Updated last year
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆299Updated 3 months ago
- Vector processor for RISC-V vector ISA☆125Updated 4 years ago
- RISC-V SOC (both single and pipeline) implemented in Verilog. Passed all test codes provided by TA.☆19Updated 2 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆173Updated 8 months ago
- Network on Chip Implementation written in SytemVerilog☆187Updated 2 years ago
- Collect some IC textbooks for learning.☆154Updated 3 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆59Updated this week
- This is a tutorial on standard digital design flow☆78Updated 4 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆164Updated 5 years ago