qxdn / 16QAM
16QAM modulation and demodulation by Verilog
☆20Updated 4 years ago
Alternatives and similar repositories for 16QAM:
Users that are interested in 16QAM are comparing it to the libraries listed below
- 异步FIFO的内部实现☆24Updated 6 years ago
- SPI interface connect to APB BUS with Verilog HDL☆27Updated 3 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆18Updated 5 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21Updated last year
- LMS-Adaptive Filter implement using verilog and Matlab☆40Updated 8 years ago
- 基于FPGA的FFT☆12Updated 6 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆31Updated 3 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆30Updated 4 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆45Updated 4 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆20Updated 5 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆14Updated 4 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆25Updated 3 years ago
- ☆14Updated 5 years ago
- ☆16Updated 5 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆30Updated 6 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆58Updated 6 months ago
- Hardware Viterbi Decoder in verilog☆24Updated 5 years ago
- AXI Interconnect☆47Updated 3 years ago
- Reed Solomon Encoder and Decoder Digital IP☆19Updated 4 years ago
- FIR filter implementation☆23Updated 4 years ago
- ☆13Updated 4 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- fpga跑sobel识别算法☆27Updated 3 years ago
- AHB-APB Bridge RTL Design☆16Updated 6 years ago
- LMS sound filtering by Verilog☆39Updated 4 years ago
- A Direct Memory Access Controller (DMAC) with AHB-lite bus interface☆11Updated 4 months ago
- ☆35Updated 9 years ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆16Updated 10 years ago
- FFT implement by verilog_测试验证已通过☆53Updated 8 years ago
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆9Updated 3 years ago