qxdn / 16QAM

Related projects ⓘ

Alternatives and complementary repositories for 16QAM

• DeamonYang / FPGA_FFT
  基于FPGA的FFT
  ☆12Updated 5 years ago
• WzyNoEmo / video-capture-and-process
  This project aims to integrate image acquisition with AI acceleration to achieve functions such as multi-channel video source input captu…
  ☆15Updated last year
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆16Updated 4 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 6 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆41Updated 2 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆35Updated 8 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆26Updated 3 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆44Updated 5 years ago
• DeamonYang / FPGA_SDR
  软件无线电，使用FPGA进行正交解调。
  ☆18Updated 5 years ago
• forever-gk / AHB-SystemVerilog
  ☆17Updated 9 years ago
• open-dv / dma_axi
  ☆16Updated 5 years ago
• MaharshSuryawala / Image-Compression
  Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.
  ☆14Updated 4 years ago
• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆37Updated 4 months ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆22Updated 5 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆45Updated 8 months ago
• JoseIuri / axi4lite2uart
  This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.
  ☆17Updated 6 years ago
• briansune / Kintex-7-OV13850-Verilog
  kintex7 ov13850 fpga mipi camera
  ☆17Updated 9 months ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆23Updated 3 years ago
• MetalheadKen / Xilinx-Project
  This is use FPGA of Xilinx ZYNQ-7000 ZC702
  ☆17Updated 7 years ago
• JefferyLi0903 / MMC
  MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计
  ☆19Updated last year
• cterrill26 / FPGA_AudioVisualizer
  Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…
  ☆14Updated 4 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆39Updated 8 years ago
• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 6 years ago
• samy-maxvy / MAXVY_MIPI_I3C_Basic_Master_Controller_IP
  It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.
  ☆16Updated 4 years ago
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆33Updated 2 years ago
• red435 / verilog_APB_SPI_interface
  SPI interface connect to APB BUS with Verilog HDL
  ☆25Updated 3 years ago
• visky2096 / AHB-to-I2C
  Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…
  ☆20Updated 5 years ago
• suisuisi / FPGAandUSB3.0
  FPGA和USB3.0桥片实现USB3.0通信
  ☆53Updated 2 years ago
• DejavuAlex / 2FSK-2PSK-2DPSK-QPSK-code-and-decode
  用Verilog语言编写，实现2FSK，2PSK, 2DPSK, QPSK调制解调
  ☆35Updated 5 years ago