A Synthesizable implementation of H.264 Video Decoding
☆36Mar 2, 2016Updated 10 years ago
Alternatives and similar repositories for synthesizable_h264
Users that are interested in synthesizable_h264 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- H265 decoder write in verilog, verified on Xilinx ZYNQ7035☆83Sep 2, 2021Updated 4 years ago
- Code for PyMTL Tutorial @ ISCA 2019☆11Jun 22, 2019Updated 6 years ago
- A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs b…☆321May 16, 2021Updated 4 years ago
- MCP server that holds vivado and allows access to vivado without starting a new batch command every time☆36Feb 19, 2026Updated 2 months ago
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Simple YCbCr-Viewer (YUV-player) with many features☆37May 13, 2013Updated 12 years ago
- This is forked from Xilinx HLS-Tiny-Tutorial. I'm learning HLS and adding Verilator testbench to verify the generated RTL☆28Oct 4, 2021Updated 4 years ago
- This project is being developed as part of a Master's degree research sponsored by Brazil's CNPQ. It's goal is to design a hardware archi…☆36Oct 4, 2022Updated 3 years ago
- Hardware Snappy decompressor☆11Sep 11, 2024Updated last year
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆28Jun 18, 2020Updated 5 years ago
- FTDI EEPROM User Area Writer For Xilinx JTAG Programmer☆12Jan 30, 2014Updated 12 years ago
- Benchmarks for High-Level Synthesis☆10Mar 17, 2023Updated 3 years ago
- Pricing derivatives using the explicit finite-difference method☆13Jul 15, 2016Updated 9 years ago
- Optimised VC-2 HQ Profile Decoder Library☆13Jun 16, 2020Updated 5 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- 海思3559A开发☆14Jan 20, 2020Updated 6 years ago
- ☆10Feb 22, 2023Updated 3 years ago
- Speed radar built from the STM32L476-Discovery board and a Doppler motion detector☆44Feb 10, 2016Updated 10 years ago
- Set of OpenCL microbenchmarks☆29Nov 19, 2025Updated 5 months ago
- Vivado HLS study notes, courses, documents.☆12Dec 7, 2019Updated 6 years ago
- Memory Benchmark for OpenCL-supported Intel FPGAs☆11Dec 25, 2023Updated 2 years ago
- A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad☆14Jan 15, 2024Updated 2 years ago
- HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)☆16Sep 25, 2024Updated last year
- AXI4-Stream FIR filter IP☆19Nov 4, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- The FCUDA CUDA-to-RTL compiler☆21Jul 1, 2016Updated 9 years ago
- ☆12May 20, 2021Updated 4 years ago
- ☆29Nov 21, 2018Updated 7 years ago
- Systolic array implementations for Cholesky, LU, and QR decomposition☆50Nov 12, 2024Updated last year
- ☆11Jan 21, 2021Updated 5 years ago
- ☆16Oct 17, 2015Updated 10 years ago
- ☆15Jan 25, 2026Updated 3 months ago
- ☆47Mar 31, 2026Updated last month
- SystemVerilog IPs and Modules for architectural redundancy designs.☆20Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆49Aug 31, 2017Updated 8 years ago
- ☆13Mar 27, 2019Updated 7 years ago
- Reverse-Engineering of the NABU PC's Network Adapter, one of the first cable data modems.☆12Mar 28, 2024Updated 2 years ago
- Official Intel SOCFPGA Arm-TF repository. Note: (1) A "RC" labeled branch is for internal active development use and customer early acces…☆18Updated this week
- A Haiku Vector Icon Format library for Haskell☆13Jan 29, 2018Updated 8 years ago
- APB Logic☆26Feb 24, 2026Updated 2 months ago
- Rust Port of VerbalExpressions☆45Feb 8, 2016Updated 10 years ago