☆15Apr 11, 2026Updated 2 months ago
Alternatives and similar repositories for RTL_Designs
Users that are interested in RTL_Designs are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆15Jan 4, 2019Updated 7 years ago
- Router 1 x 3 verilog implementation☆15Sep 5, 2021Updated 4 years ago
- Router 1x3 design and uvm verification testbach and coverage report☆13Nov 8, 2024Updated last year
- Learn and build GPU RTL from scratch☆22Aug 1, 2025Updated 11 months ago
- ☆12Mar 11, 2021Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A simple example of using the SDAccel build flow for AWS EC2's F1 instance type. Trys to avoid magic makefiles.☆10Aug 27, 2017Updated 8 years ago
- 32-bit 5-stage pipelined RISC-V processor in SystemVerilog☆38Oct 29, 2023Updated 2 years ago
- An uvm verification env for ahb2apb bridge☆58Apr 9, 2021Updated 5 years ago
- RTL implementation of a ray-tracing GPU☆16Dec 18, 2012Updated 13 years ago
- The home of the Chisel3 website☆21May 24, 2024Updated 2 years ago
- Custom ASIC Design for SHA-256☆14Nov 22, 2025Updated 7 months ago
- Simple UVM testbench development using the uvmtb_template files☆25Jan 16, 2025Updated last year
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆24Apr 25, 2025Updated last year
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆115Jul 2, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆25Jun 7, 2026Updated 3 weeks ago
- AES☆15Oct 4, 2022Updated 3 years ago
- ☆16Apr 24, 2023Updated 3 years ago
- Implemented the internals of a real-time operating system.☆10Jan 15, 2015Updated 11 years ago
- Formal Verification of RISC V IM Processor☆11Mar 27, 2022Updated 4 years ago
- This is a passion project where I aim to explore the RTL design topics of my interest.☆13May 23, 2025Updated last year
- Static timing analysis (STA) is a method of validating the timing performance of a design by checking all possible paths for timing viola…☆19Oct 4, 2022Updated 3 years ago
- ☆11Apr 22, 2024Updated 2 years ago
- Numpy-like encrypted matrix arithmetic library based on OpenFHE☆32Jun 25, 2026Updated last week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- [UNRELEASED] FP div/sqrt unit for transprecision☆27Jun 1, 2026Updated last month
- Open Processor Architecture☆26Apr 7, 2016Updated 10 years ago
- ☆20Aug 3, 2018Updated 7 years ago
- Sigma-Delta Analog to Digital Converter in FPGA (VHDL)☆16Dec 19, 2017Updated 8 years ago
- Periodica is a Beautiful yet extremely useful and intuitive Periodic Table representation.☆11Jul 20, 2022Updated 3 years ago
- An OSEK-VDX implementation.☆10Mar 22, 2026Updated 3 months ago
- Post-synthesis power optimization via dual-Vth cell assignment and gate re-sizing. Scripting in TCL with custom commands written for Syno…☆14Jun 9, 2021Updated 5 years ago
- SW of Boot Loader that flashes a static Application, example for AVR Atmega32☆10May 12, 2020Updated 6 years ago
- RTL to GDS via Cadence Tools☆19May 17, 2022Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Spectre V1 Proof-of-Concept Attack in the Rust Language☆30Apr 3, 2025Updated last year
- A simple 16bit system-on-chip (SoC) consisting of a CPU and GPU☆32Jun 3, 2025Updated last year
- An open source, parameterized SystemVerilog digital hardware IP library☆33May 26, 2024Updated 2 years ago
- ☆11Jul 29, 2024Updated last year
- Automatic Test Pattern Generation using PODEM algorithm☆15May 12, 2014Updated 12 years ago
- Reconfigurable Computing Lab, DESE, Indian Institiute of Science☆29Jun 22, 2024Updated 2 years ago
- Talabat Integration Platform API System Clone☆20Apr 7, 2025Updated last year