DreamCloud-Project / McSim-TLM-NoC

Related projects: ⓘ

• chad-q / andes-vector-riscv-dv
  Andes Vector Extension support added to riscv-dv
  ☆14Updated 4 years ago
• jessebarreto / NetworkOnChip
  Development of a Network on Chip Simulation using SystemC.
  ☆30Updated 7 years ago
• frobino / Nostrum-SystemC-simulator
  SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).
  ☆13Updated 10 years ago
• DreamCloud-Project / McSim-Cycle-accurate-NoC
  Manycore platform Simulation tool for NoC-based platform at a Cycle-accurate level
  ☆10Updated 6 years ago
• hyoukjun / microswitch-noc
  ☆21Updated 4 years ago
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆24Updated 4 years ago
• maltanar / spmvaccsim
  A SystemC + DRAMSim2 simulator for exploring the SpMV hardware accelerator design space.
  ☆13Updated 9 years ago
• chipsalliance / aib-protocols
  ☆22Updated 7 months ago
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆38Updated 4 years ago
• adki / cosim_bfm_library
  HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI
  ☆28Updated 3 years ago
• maltanar / systemc-chisel-tools
  A collection of tools for working with Chisel-generated hardware in SystemC
  ☆16Updated 5 years ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆43Updated 3 months ago
• pulp-platform / hwpe-stream
  IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
  ☆18Updated last month
• riscv-verification / riscvISACOV
  SystemVerilog Functional Coverage for RISC-V ISA
  ☆22Updated 7 months ago
• Arteris-IP / tlm2-interfaces
  contains TLM2 based interfaces for AXI, ACE, CHI and other standard protocols
  ☆44Updated this week
• RoaLogic / ahb3lite_pkg
  Common SystemVerilog package used by all RoaLogic IP with AMBA AHB3-Lite interfaces
  ☆15Updated 4 months ago
• jmjos / ratatoskr
  Ratatoskr NoC Simulator
  ☆18Updated 3 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆44Updated 7 years ago
• ljgibbslf / basic_cache_core
  ☆23Updated 4 years ago
• hlslibs / ac_ml
  Algorithmic C Machine Learning Library
  ☆20Updated last month
• ic-lab-duth / DRIM
  DUTH RISC-V Microprocessor
  ☆18Updated 3 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆30Updated last year
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆41Updated last year
• rggen / rggen-sample-testbench
  ☆14Updated 3 months ago
• TUM-LIS / lisnoc
  LIS Network-on-Chip Implementation
  ☆28Updated 8 years ago
• freecores / an-fpga-implementation-of-low-latency-noc-based-mpsoc
  NoC based MPSoC
  ☆10Updated 10 years ago
• pulp-platform / fpu
  ☆35Updated 5 years ago
• StanfordAHA / AhaM3SoC
  SoC Based on ARM Cortex-M3
  ☆24Updated 4 months ago
• cornell-brg / alloy-asic
  ☆15Updated this week
• hyoukjun / OpenSMART
  Public release
  ☆45Updated 5 years ago