sjtu-zhao-lab / pomLinks
An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation
☆50Updated last year
Alternatives and similar repositories for pom
Users that are interested in pom are comparing it to the libraries listed below
Sorting:
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆85Updated 3 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆69Updated 4 months ago
- ☆29Updated 2 months ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆86Updated last year
- A co-design architecture on sparse attention☆51Updated 3 years ago
- Allo: A Programming Model for Composable Accelerator Design☆253Updated last week
- ☆77Updated last year
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆42Updated last year
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆88Updated last year
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆45Updated 3 months ago
- ☆49Updated 3 years ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 2 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆60Updated 4 months ago
- [FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS☆13Updated 5 months ago
- ☆172Updated last year
- PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training☆17Updated last year
- ☆56Updated 4 months ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆29Updated last year
- ☆47Updated 2 weeks ago
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆36Updated 7 months ago
- ☆35Updated 7 months ago
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆17Updated 4 months ago
- ☆31Updated 4 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆82Updated last year
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆135Updated 5 months ago
- Serpens is an HBM FPGA accelerator for SpMV☆19Updated last year
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆100Updated 11 months ago
- ☆38Updated 2 months ago
- ☆146Updated 6 months ago
- ☆52Updated last year