Alternatives and similar repositories for hacc_demo

Users that are interested in hacc_demo are comparing it to the libraries listed below

• cornell-zhang / allo-pldi24-artifact
  Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"
  ☆31Updated last year
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆22Updated last year
• he-actlab / planaria.code
  ☆29Updated 4 years ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆78Updated 7 months ago
• upmem / upmem_llm_framework
  UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.
  ☆37Updated 4 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆45Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆74Updated 3 years ago
• CLab-HKUST-GZ / micro58-axcore
  ☆28Updated 2 months ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆106Updated 7 months ago
• scalesim-project / scale-sim-v3
  ☆51Updated 3 weeks ago
• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆44Updated 2 years ago
• ucb-bar / MoCA
  ☆28Updated 2 years ago
• SFU-HiAccel / HiSpMV
  [TRETS 2025][FPGA 2024] FPGA Accelerator for Imbalanced SpMV using HLS
  ☆18Updated 3 months ago
• UniNDP-hpca25-ae / UniNDP
  Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"
  ☆49Updated 3 months ago
• leesou / PIM-DL-ASPLOS
  PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization
  ☆34Updated last year
• scale-snu / attacc_simulator
  ☆115Updated last year
• maestro-project / confuciux
  ☆32Updated 4 years ago
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆87Updated last year
• hatsu3 / Sanger
  ☆47Updated 4 years ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆52Updated 4 years ago
• maestro-project / gamma
  ☆42Updated last year
• ucb-bar / dosa
  DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators
  ☆18Updated last year
• arc-research-lab / SSR
  SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
  ☆35Updated this week
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆60Updated 8 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆92Updated last year
• isakedo / DNNsim
  ☆35Updated 5 years ago
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆45Updated last year
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆55Updated 4 years ago