JeremyV2014 / VerilogSHA256MinerLinks

Implementation of SHA256 Hasher with UART Transceiver in Verilog. Designed to run on Altera's DE2 FPGA Development Board.
16Updated 6 years ago

Alternatives and similar repositories for VerilogSHA256Miner

Users that are interested in VerilogSHA256Miner are comparing it to the libraries listed below

Sorting: