Implementation of SHA256 Hasher with UART Transceiver in Verilog. Designed to run on Altera's DE2 FPGA Development Board.
☆16Oct 16, 2018Updated 8 years ago
Alternatives and similar repositories for VerilogSHA256Miner
Users that are interested in VerilogSHA256Miner are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SHA-256 IP core for ZedBoard (Zynq SoC)☆31Jun 22, 2018Updated 8 years ago
- Implementation of the SHA256 Algorithm in Verilog☆39Jan 2, 2012Updated 14 years ago
- FIPS 202 compliant SHA-3 core in Verilog☆26Oct 8, 2020Updated 6 years ago
- QQ音乐爬虫 网易云音乐爬虫 vip音乐下载 用户交互界面☆10Jul 2, 2020Updated 6 years ago
- Clock Data Recovery | 時鐘數據恢復☆12Aug 9, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Library of generic verilog buildingblocks☆18Dec 25, 2025Updated 10 months ago
- This paper presents design of UART module for serial communication used for short-distance, low speed and exchange of data between comput…☆15Mar 30, 2022Updated 4 years ago
- Small example of using Metal in Swift☆11Jul 28, 2016Updated 10 years ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- All Digital Phase-Locked Loop☆15May 22, 2023Updated 3 years ago
- simple RISC-V 64bit emulator, which can boot linux kernel.☆13Oct 16, 2023Updated 3 years ago
- AES hardware engine for Xilinx Zynq platform☆32Aug 22, 2021Updated 5 years ago
- Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.☆17Oct 8, 2020Updated 6 years ago
- BLE button app on Android☆10Jul 4, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An Open Source FPGA GroestlCoin Miner☆10Feb 11, 2018Updated 8 years ago
- Recording and playing uncompressed audio using AVAudioEngine☆12Jul 10, 2022Updated 4 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- Just experimenting with Open Source SoCs on my Altera dev kit.☆12Feb 10, 2012Updated 14 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- fomo3d airdrop attack contract manager☆13Aug 31, 2018Updated 8 years ago
- Zedboard projects☆11May 15, 2016Updated 10 years ago
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- Implementation of the PCIe physical layer☆64Jul 11, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- some interpreters with high protability☆17Jul 10, 2022Updated 4 years ago
- ☆15Feb 24, 2019Updated 7 years ago
- Using Web3.js to Send Transactions on BSC☆10Feb 10, 2022Updated 4 years ago
- Image Signal Processing Assignments☆16May 1, 2018Updated 8 years ago
- Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.☆17Jan 10, 2018Updated 8 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19May 28, 2012Updated 14 years ago
- Hardware implementation of the SHA-256 cryptographic hash function☆394Dec 15, 2025Updated 10 months ago
- An open source FPGA miner for Blakecoin☆53Sep 22, 2014Updated 12 years ago
- ☆20Aug 10, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Repository containing the basic peripheral drivers of nrf52832 SoC to get started☆16Sep 4, 2016Updated 10 years ago
- Identifies ASL Hand Gesture for numbers using image processing in verilog☆15May 3, 2012Updated 14 years ago
- The complete project for my tutorial on how to render a circle to the screen using Metal Shaders☆16Apr 22, 2020Updated 6 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit GMSK☆17Dec 9, 2018Updated 7 years ago
- open cv software isp study☆18Nov 9, 2020Updated 5 years ago
- FPGA miner for OdoCrypt☆13Jul 25, 2019Updated 7 years ago
- ☆10May 19, 2017Updated 9 years ago