IT302 / choLinks
CHO is a benchmark suite for OpenCL FPGA Accelerators
☆19Updated 8 years ago
Alternatives and similar repositories for cho
Users that are interested in cho are comparing it to the libraries listed below
Sorting:
- SMASH is a hardware-software cooperative mechanism that enables highly-efficient indexing and storage of sparse matrices. The key idea of…☆16Updated 5 years ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆96Updated 2 weeks ago
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆31Updated last year
- Memory System Microbenchmarks☆63Updated 2 years ago
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated 2 years ago
- FPGA-based HyperLogLog Accelerator☆12Updated 4 years ago
- SST Macro Element Library☆37Updated this week
- Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware☆16Updated 3 years ago
- A survey on architectural simulators focused on CPU caches.☆16Updated 5 years ago
- a clone of POCL that includes RISC-V newlib devices support and Vortex☆42Updated 3 months ago
- Source code of the simulator used in the Mosaic paper from MICRO 2017: "Mosaic: A GPU Memory Manager with Application-Transparent Support…☆49Updated 6 years ago
- A Benchmark Suite for Heterogeneous System Computation☆53Updated 4 months ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆67Updated 10 months ago
- HeteroCL-MLIR dialect for accelerator design☆41Updated 9 months ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆26Updated 2 years ago
- MAFIA: Multiple Application Framework for GPU architectures☆27Updated 3 years ago
- Spector: An OpenCL FPGA Benchmark Suite☆48Updated 6 years ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆41Updated 2 weeks ago
- A Vector Caching Scheme for Streaming FPGA SpMV Accelerators☆10Updated 9 years ago
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆33Updated this week
- XRM (Xilinx FPGA Resource Manager) Document:☆25Updated last year
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆30Updated 9 months ago
- The Shang high-level synthesis framework☆120Updated 11 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- ☆30Updated 3 weeks ago
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆21Updated last week
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- ☆87Updated 2 years ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆104Updated 5 months ago