FAST-9 Accelerator for Corner Detection
☆38Jan 1, 2021Updated 5 years ago
Alternatives and similar repositories for FAST9-Accelerator
Users that are interested in FAST9-Accelerator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Design real-time image processing, object recognition and PID control for Autonomous Drone.☆37Nov 26, 2017Updated 8 years ago
- Using opencv3.3.1&C++ to compare ORB、SIFT、SURF、FAST features detect algorithms.☆10Sep 27, 2018Updated 8 years ago
- ☆10Feb 27, 2020Updated 6 years ago
- ☆31Aug 19, 2019Updated 7 years ago
- MAESTRO binary release☆23Nov 14, 2019Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Library of generic verilog buildingblocks☆17Dec 25, 2025Updated 9 months ago
- ☆10Feb 8, 2023Updated 3 years ago
- A quick reference/ cheatsheet for the ARM AMBA Advanced eXtensible Interface (AXI)☆31Oct 28, 2018Updated 7 years ago
- Identifies ASL Hand Gesture for numbers using image processing in verilog☆15May 3, 2012Updated 14 years ago
- 电机转速转矩测量系统分两部分：1.基于STM32F103单片机的信号采集模块。2、用Qt编写的界面显示软件☆12Jun 28, 2016Updated 10 years ago
- Network on Chip for MPSoC☆30Aug 7, 2026Updated 2 months ago
- Hardware Division Units☆10Jul 17, 2014Updated 12 years ago
- Examples of TI-C6678 DSP☆16Jul 6, 2019Updated 7 years ago
- 使用KCF目标追踪算法进行目标识别和追踪，实现导弹的精确打击。☆10Jan 28, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- servo motor control with FPGA☆10Nov 14, 2015Updated 10 years ago
- 2D discrete cosine transform (DCT) of an 8x8 image in verilog HDL☆16Sep 2, 2022Updated 4 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆22Dec 10, 2022Updated 3 years ago
- Virtual Platform for AWS FPGA support☆16Oct 19, 2018Updated 7 years ago
- ☆42Oct 26, 2021Updated 4 years ago
- Implementing Different Adder Structures in Verilog☆78Sep 3, 2019Updated 7 years ago
- ☆36Mar 8, 2023Updated 3 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆68Sep 24, 2021Updated 5 years ago
- Mirror of tachyon-da cvc Verilog simulator☆58Mar 16, 2026Updated 6 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Cryptonight Monero Verilog code for ASIC☆20Mar 29, 2018Updated 8 years ago
- my rc files☆12Mar 16, 2016Updated 10 years ago
- Programmatically control ROS Bag files.☆13Sep 5, 2017Updated 9 years ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- ☆22Apr 8, 2025Updated last year
- MAERI public release☆33Sep 8, 2021Updated 5 years ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- ☆37Jun 19, 2023Updated 3 years ago
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- LLVM 2.9 branch with TI C64x backend.☆11Oct 17, 2019Updated 6 years ago
- Right Handed MSCKF with Hamiltonian Quaternions☆18Dec 22, 2019Updated 6 years ago
- 🚀Way to learn KCF's principle and implement it in TI's C6678 DSP. 😃☆16Jan 23, 2019Updated 7 years ago
- Examples from the book by Deschamps et al. https://www.amazon.com/Implementation-Arithmetic-Functions-Electrical-Engineering/dp/940072986…☆19Apr 17, 2019Updated 7 years ago
- Implementation of RSA algorithm on FPGA using Verilog☆27Aug 1, 2018Updated 8 years ago
- RISC-V assembler/simulator with GUI☆13Jul 31, 2022Updated 4 years ago