Frogwells / fpga_cmos_designLinks
这是使用FPGA开发CMOS的两个真实项目,之前的fpga_design仅是一个未完善的版本,同时也删除了一些与项目无关的东西
☆35Updated 7 years ago
Alternatives and similar repositories for fpga_cmos_design
Users that are interested in fpga_cmos_design are comparing it to the libraries listed below
Sorting:
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆94Updated 8 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- 七路图像在FPGA中实现拼接,代码会不断添加进来。☆27Updated 4 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆136Updated last year
- ISP-Lite, VIP, MIPI-RX IP实现,测试平台为KV260+AR1335 3MP@30fps☆101Updated 2 years ago
- 视频旋转(2019FPGA大赛)☆37Updated 5 years ago
- FPGA☆127Updated 5 years ago
- ☆31Updated 5 years ago
- 基于FPGA的FFT☆19Updated 6 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆73Updated 3 years ago
- ☆37Updated 10 years ago
- image processing based FPGA☆115Updated 4 years ago
- An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。☆33Updated last year
- FPGA Technology Exchange Group相关文件管理☆53Updated last month
- An FPGA-based LZMA compressor for generic data compression. 基于FPGA的LZMA压缩器,用于通用数据压缩。☆87Updated 2 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆39Updated 4 years ago
- A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board☆33Updated 3 years ago
- A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。☆116Updated 2 years ago
- Cortex M0 based SoC☆75Updated 4 years ago
- FFT implement by verilog_测试验证已通过☆59Updated 9 years ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆33Updated 3 years ago
- An FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器,用来进行无损图像压缩。☆98Updated last year
- ISP☆13Updated last year
- Bilinear interpolation realizes image scaling based on FPGA☆28Updated 5 years ago
- Step by step tutorial for building CortexM0 SoC☆38Updated 3 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆56Updated 2 years ago
- 使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例☆109Updated last year
- Interface Protocol in Verilog☆50Updated 6 years ago
- H264视频解码verilog实现☆83Updated 8 years ago
- Gigabit Ethernet UDP communication driver☆79Updated 6 years ago