LPC (Low Pin Count) interface peripheral module in pure Verilog
☆17Jan 15, 2024Updated 2 years ago
Alternatives and similar repositories for verilog-lpc-module
Users that are interested in verilog-lpc-module are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Designing means to communicate as an SPI master, being a part of AXI interface☆21Sep 14, 2023Updated 2 years ago
- SystemVerilog derslerinde yazdığım kodları içermektedir.☆14Nov 19, 2023Updated 2 years ago
- ☆16Dec 16, 2021Updated 4 years ago
- Groundhog - Serial ATA Host Bus Adapter☆24Jun 10, 2018Updated 8 years ago
- Build DIY a PS2 to OG XBOX controller adapter☆13Mar 26, 2025Updated last year
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- FIFO implementation with different clock domains for read and write.☆16Aug 17, 2021Updated 4 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆37May 12, 2020Updated 6 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated 2 years ago
- TCAM (Ternary Content-Addressable Memory) in Verilog☆58Oct 9, 2023Updated 2 years ago
- Converts USB mice and USB keyboards to serial mice and XT-AT-PS/2 keyboards☆12Jul 9, 2024Updated 2 years ago
- DC-SCM LTPI Reference Implementation☆24Jan 13, 2026Updated 7 months ago
- ☆12Sep 22, 2020Updated 5 years ago
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago
- Clone of https://git.kernel.org/pub/scm/linux/kernel/git/gong.chen/aer-inject.git/ with 32-bit domain support☆12May 30, 2017Updated 9 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- M.2 Key E KiCad footprints☆14Nov 24, 2023Updated 2 years ago
- Verilog Ethernet Switch (layer 2)☆58Oct 18, 2023Updated 2 years ago
- 一个基于ModBus RTU协议的PLC继电器从站☆11Dec 2, 2015Updated 10 years ago
- ESP8266 as wireless AVR (arduino) programmer☆12Nov 30, 2022Updated 3 years ago
- How to design a MIPI CSI interface with Efinix Trion FPGA T20F169 QUICKLY☆10Feb 6, 2020Updated 6 years ago
- ☆18Jun 23, 2026Updated last month
- PID controller on an FPGA with custom RS232 addressing protocol.☆25Sep 7, 2021Updated 4 years ago
- A simple CANopen stack implemented using C programming language.☆12Apr 23, 2014Updated 12 years ago
- a hardware task scheduler design☆10Sep 14, 2022Updated 3 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- PID controller☆25Jul 17, 2014Updated 12 years ago
- Hardware Root of Trust☆27Dec 6, 2024Updated last year
- A configuration controller solution allowing a Zynq device to configure downstream FPGAs☆14Oct 5, 2015Updated 10 years ago
- An open-source Ternary Content Addressable Memory (TCAM) compiler.☆37Jul 19, 2024Updated 2 years ago
- fpga i2c slave verilog hdl rtl☆16Nov 26, 2015Updated 10 years ago
- A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board☆13Sep 7, 2018Updated 7 years ago
- RGB Addon Board for the OpenXenium modchip.☆16Nov 11, 2019Updated 6 years ago
- SystemVerilog Example Files☆11Jan 15, 2013Updated 13 years ago
- 【自用】阿里云 DDNS☆19Dec 7, 2018Updated 7 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- this is an copy of https://github.com/felis/USB_Host_Shield_2.0, with out examples, with pi-pico-rp2040 supported.☆10Dec 29, 2021Updated 4 years ago
- DMA core compatible with AHB3-Lite☆13Mar 30, 2019Updated 7 years ago
- modern gdbstub/rsp server library☆18Feb 11, 2026Updated 6 months ago
- AES☆16Oct 4, 2022Updated 3 years ago
- ☆13Jun 9, 2022Updated 4 years ago
- ☆24Jun 22, 2026Updated last month
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago