The Final Project of team 8, NTUEE, Digital Circuits Lab (2021 Fall)
☆37Feb 26, 2022Updated 4 years ago
Alternatives and similar repositories for Real-Time-Image-Video-Dehazing
Users that are interested in Real-Time-Image-Video-Dehazing are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…☆66Jun 11, 2024Updated 2 years ago
- 七路图像在FPGA中实现拼接，代码会不断添加进来。☆29Aug 17, 2021Updated 5 years ago
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆36Dec 4, 2025Updated 9 months ago
- Implementation of Canny Edge Detection on Cyclone IV. To run project you need Quartus and ModelSim.☆15Mar 29, 2020Updated 6 years ago
- Constrast limited adaptive histogram equlization based on Verilog☆41Jul 21, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- image processing based FPGA☆120Sep 2, 2021Updated 5 years ago
- 基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）☆54Apr 23, 2020Updated 6 years ago
- FPGA-Edge-Detection-Project1☆71Feb 24, 2022Updated 4 years ago
- FPGA图像处理仿真平台☆31Apr 25, 2022Updated 4 years ago
- A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure☆17Nov 19, 2019Updated 6 years ago
- Dehazing algorithm implemented on CUDA.☆10May 5, 2015Updated 11 years ago
- An oscilloscope written for the Mojo V3, a Spartan-6 based FPGA☆11May 23, 2017Updated 9 years ago
- ISP☆14Nov 25, 2023Updated 2 years ago
- ☆11Jul 12, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆11Feb 28, 2016Updated 10 years ago
- ☆15Dec 18, 2022Updated 3 years ago
- STM32 Lib LCD1602 LCD2004 LCD0802 I2C or 4BIT☆16Aug 7, 2021Updated 5 years ago
- Nexys 4 DDR Artix-7☆12Jun 15, 2018Updated 8 years ago
- IPDBG☆13Updated this week
- servo motor control with FPGA☆10Nov 14, 2015Updated 10 years ago
- Implementation of a 2D Convolutional Filter using VHDL for FPGAs.☆15Aug 21, 2022Updated 4 years ago
- Applying various image enhancement algorithms on Night Vision IR images using Xilinx Vivado☆15Oct 27, 2023Updated 2 years ago
- ☆10Dec 12, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- IC Contest☆47Mar 28, 2023Updated 3 years ago
- 一款Cyclone Ⅳ(EP4CE6E22C8N)的FPGA板，板载JTAG下载电路、HDMI(output)、UART、SDRAM、TFT-LCD等☆18Jun 29, 2023Updated 3 years ago
- implementation in verilog rtl for an FPGA to detect the presence of a face in an image☆13Mar 12, 2021Updated 5 years ago
- - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA☆13Jul 18, 2017Updated 9 years ago
- FT2232HL JTAG & UART Downloader☆22Jul 18, 2021Updated 5 years ago
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆33Mar 18, 2023Updated 3 years ago
- digital recognition base on FPGA☆12Nov 10, 2019Updated 6 years ago
- High-performance FPGA-based JPEG codec accelerator☆13Dec 1, 2018Updated 7 years ago
- This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface.…☆22Oct 28, 2024Updated last year
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- JPEG Encoder for Cortex-M☆14Sep 2, 2016Updated 10 years ago
- SEA-S7_gesture recognition☆17Aug 1, 2020Updated 6 years ago
- Verilog implementation of a ultrasonic radar☆21Jan 7, 2018Updated 8 years ago
- Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board☆21Nov 17, 2021Updated 4 years ago
- R22SDF FFT VLSI/FPGA investigate and implementation☆17Apr 22, 2022Updated 4 years ago
- https://en.wikipedia.org/wiki/CAN_bus☆17Nov 6, 2020Updated 5 years ago
- OV7670 (Verilog HDL)Drive for FPGA☆19Mar 4, 2019Updated 7 years ago