FSq-Poplar / FPGA_NN
A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.
☆17Updated 5 years ago
Alternatives and similar repositories for FPGA_NN
Users that are interested in FPGA_NN are comparing it to the libraries listed below
Sorting:
- A Verilog design of LeNet-5, a Convolutional Neural Network architecture☆32Updated 4 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 6 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆22Updated 7 years ago
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆31Updated 2 years ago
- An LeNet RTL implement onto FPGA☆48Updated 7 years ago
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆11Updated 9 months ago
- Convolutional Neural Network RTL-level Design☆53Updated 3 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 5 years ago
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆15Updated 2 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆151Updated 10 months ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- Spiking Neural Network RTL Implementation☆57Updated 3 years ago
- ☆15Updated 3 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆22Updated 5 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆58Updated 2 months ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆34Updated last year
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆56Updated 2 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆40Updated 4 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆41Updated last year
- FPGA and GPU acceleration of LeNet5☆35Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆47Updated 7 years ago
- Final project for Computer Architecture FA16☆17Updated 8 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆33Updated 5 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆16Updated 4 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆24Updated 3 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆22Updated 4 years ago
- This repository contains full code of Softmax Layer in Verilog☆18Updated 4 years ago