Alternatives and similar repositories for Arty:

Users that are interested in Arty are comparing it to the libraries listed below

• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆124Updated last year
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆74Updated last year
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆38Updated 7 months ago
• icebreaker-fpga / icebreaker-verilog-examples
  This repository contains small example designs that can be used with the open source icestorm flow.
  ☆143Updated 3 years ago
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆33Updated 6 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆83Updated 6 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆124Updated 3 weeks ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• olofk / observer
  ☆40Updated 4 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• vpecanins / max1000-tutorial
  Tutorial and example projects for the Arrow MAX1000 FPGA board
  ☆52Updated 6 months ago
• hamsternz / FPGA_GigabitTx
  Sending UDP packets out over a Gigabit PHY with an FPGA.
  ☆42Updated 8 years ago
• open-design / riscv-soc-cores
  ☆37Updated 3 years ago
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆113Updated last year
• ldoolitt / vhd2vl
  ☆124Updated last month
• duskwuff / Xilinx-ISE-Makefile
  An example of how to use the Xilinx ISE toolchain from the command line
  ☆61Updated 5 years ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆40Updated 6 years ago
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆169Updated this week
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆94Updated 2 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆55Updated last year
• mcmayer / iCE40
  Lattice iCE40 FPGA experiments - Work in progress
  ☆103Updated 3 years ago
• ZipCPU / xulalx25soc
  A System on a Chip Implementation for the XuLA2-LX25 board
  ☆16Updated 6 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆84Updated 10 months ago
• tommythorn / yarvi
  Yet Another RISC-V Implementation
  ☆86Updated 3 months ago
• WillGreen / timetoexplore
  Source code to accompany https://timetoexplore.net
  ☆62Updated 4 years ago
• ZipCPU / dbgbus
  A collection of debugging busses developed and presented at zipcpu.com
  ☆37Updated last year
• FPGAwars / FPGA-peripherals
  Collection of open-source peripherals in Verilog
  ☆173Updated 2 years ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆63Updated 6 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆76Updated 2 years ago
• binary-logic / vj-uart
  Virtual JTAG UART for Altera Devices
  ☆45Updated 10 years ago