☆18Dec 13, 2022Updated 3 years ago
Alternatives and similar repositories for Physical-Verification-using-synopsys-40nm
Users that are interested in Physical-Verification-using-synopsys-40nm are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆16May 23, 2024Updated 2 years ago
- RTL to GDS via Cadence Tools☆19May 17, 2022Updated 4 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆21Aug 19, 2024Updated 2 years ago
- This repository presents ASIC design flow for UART utilizing RTL to GDS implementation This has been simulated on VCS and has been impl…☆32Apr 29, 2024Updated 2 years ago
- Linter for SystemVerilog Assertions (SVA). Following the philosophy of BYOL - Build Your Own Linter, SVALint is an example of ho users ca…☆21Aug 23, 2026Updated 3 weeks ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- This repository contains all the materials related to the basic MOSFET theory, CMOS technology, circuit and layout design, and basic PDK …☆15Dec 15, 2023Updated 2 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆134Feb 22, 2024Updated 2 years ago
- Complete installation flow of yosys, OpenSTA and OpenROAD for RTL Verification, Synthesis, Timing Analysis, Power Analysis & GDSII layout…☆26Jul 21, 2025Updated last year
- Artifacts for the SCVP lecture☆12Nov 17, 2021Updated 4 years ago
- Low Power VLSI Design Concepts & Interview Questions for Top Semiconductor MNCs☆12Jan 12, 2023Updated 3 years ago
- Simple UVM testbench development using the uvmtb_template files☆26Jan 16, 2025Updated last year
- Scrabble in C++, done for an OOPS course project☆15May 19, 2021Updated 5 years ago
- ☆18Apr 7, 2022Updated 4 years ago
- AT89C52单片机实验程序:发光二极管的亮灭、多个发光二极管分组循环交替亮灭、外部中断控制数码管循环显示0~9、定时器控制发光二极管的亮灭+简单输出连续矩形脉冲。☆11Mar 20, 2022Updated 4 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆32Oct 3, 2022Updated 3 years ago
- Code implementing the system of nonlinear equations that describes nonlinearities in silicon microring modulators.☆10Apr 5, 2021Updated 5 years ago
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆18Oct 16, 2021Updated 4 years ago
- Misc utility FPGA cores☆13Mar 21, 2023Updated 3 years ago
- Some beginner projects using verilog HDL, along with some documentation on basic syntax☆14Jun 13, 2021Updated 5 years ago
- This is a multi-core processor specially designed for matrix multiplication using Verilog HDL.☆12Jan 8, 2022Updated 4 years ago
- Personal mirror for adv_debug_sys☆11Aug 23, 2011Updated 15 years ago
- A backend API for Quiz inspired by 16 personalities☆11Oct 5, 2021Updated 4 years ago
- Build infrastructure for class-wide tapeout for 18-224/624 Intro to Open Source Chip Design, Spring 2023☆22Aug 10, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Tiny ImageNet Classification Exercise with PyTorch☆16Aug 21, 2021Updated 5 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- WM8731 Audio CODEC using Verilog (DE2-115)☆11Jul 28, 2019Updated 7 years ago
- 3D Mapping using 2D LiDAR☆20Aug 18, 2023Updated 3 years ago
- Arizona State University CSE320☆14Mar 22, 2015Updated 11 years ago
- Memory Compiler Tutorial☆14Oct 7, 2020Updated 5 years ago
- ☆20Sep 16, 2022Updated 4 years ago
- A Verilog Filelist parser in Rust☆11Mar 25, 2022Updated 4 years ago
- APB Timer Unit☆14Oct 30, 2025Updated 10 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Example project for the React Native DevOps Guide.☆20Dec 8, 2022Updated 3 years ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆16Jul 14, 2019Updated 7 years ago
- Routing Visualization for Physical Design☆22Dec 24, 2018Updated 7 years ago
- Automated UVM testbench generator from Verilog RTL with optional LLM integration for advanced logic creation.☆35Feb 24, 2026Updated 6 months ago
- Example SystemVerilog UVM Environment☆11Jun 23, 2015Updated 11 years ago
- ☆21Aug 4, 2022Updated 4 years ago
- ☆17Sep 19, 2022Updated 4 years ago