Alternatives and similar repositories for digilent-apps

Users that are interested in digilent-apps are comparing it to the libraries listed below

• Digilent / u-boot-digilent
  u-boot-xarm from xilinx git repo with Digilent additions
  ☆31Updated last year
• FPGAwars / FPGA-peripherals
  Collection of open-source peripherals in Verilog
  ☆184Updated 3 years ago
• ikwzm / FPGA-SoC-Linux
  FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de1…
  ☆168Updated 2 months ago
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆124Updated 3 years ago
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆63Updated 10 months ago
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆61Updated 8 months ago
• OpenDGPS / zynq-axi-dma-sg
  Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020
  ☆56Updated 8 years ago
• Avnet / hdl
  ☆114Updated 10 months ago
• freecores / turbo8051
  turbo 8051
  ☆29Updated 8 years ago
• imrickysu / ZYNQ-Cookbook
  This is a wiki and code sharing for ZYNQ
  ☆74Updated 9 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆83Updated 6 years ago
• fpgadeveloper / zedboard-axi-dma
  Demonstration of the AXI DMA engine on the ZedBoard
  ☆55Updated 4 years ago
• dukelec / cdpga
  FPGA core boards / evaluation boards based on CDCTL hardware
  ☆94Updated 3 weeks ago
• jakubcabal / spi-fpga
  SPI master and SPI slave for FPGA written in VHDL
  ☆180Updated 4 years ago
• MorrisMA / 1PPS-DPLL
  DPLL for phase-locking to 1PPS signal
  ☆34Updated 9 years ago
• Tommydag / CAN-Bus-Controller
  An CAN bus Controller implemented in Verilog
  ☆50Updated 10 years ago
• Obijuan / RISC-V-FPGA
  RISC-V CPU for OpenFPGAs, in Icestudio
  ☆97Updated last year
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆76Updated last year
• jakubcabal / uart-for-fpga
  Simple UART controller for FPGA written in VHDL
  ☆105Updated 4 years ago
• CospanDesign / nysa-sata
  ☆89Updated 8 years ago
• Digilent / Petalinux-Arty-Z7-20
  ☆22Updated 6 years ago
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆131Updated 2 years ago
• Xilinx / XilinxVirtualCable
  Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or S…
  ☆265Updated 2 months ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• h-nasiri / Zynq-Linux-DMA
  DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.
  ☆41Updated 8 years ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆68Updated 3 years ago
• bmartini / zynq-axis
  Hardware, Linux Driver and Library for the Zynq AXI DMA interface
  ☆104Updated 7 years ago
• q3k / zturn-stuff
  Migrated to Codeberg
  ☆95Updated 8 years ago
• analogdevicesinc / meta-adi
  This is the Analog Devices Inc. Yocto/OpenEmbedded layer
  ☆46Updated 3 months ago
• freecores / can
  CAN Protocol Controller
  ☆40Updated 11 years ago