AEW2015 / fpga-colab
FPGA examples on Google Colab
☆22Updated last year
Alternatives and similar repositories for fpga-colab:
Users that are interested in fpga-colab are comparing it to the libraries listed below
- ☆41Updated last year
- A Python package for generating HDL wrappers and top modules for HDL sources☆32Updated last week
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆17Updated last month
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆21Updated 5 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆50Updated 3 months ago
- Bitstream relocation and manipulation tool.☆44Updated 2 years ago
- A pipelined RISC-V processor☆55Updated last year
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆45Updated last year
- RISC-V Nox core☆62Updated last month
- Flip flop setup, hold & metastability explorer tool☆34Updated 2 years ago
- A compact, configurable RISC-V core☆11Updated last month
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆91Updated 8 months ago
- ☆59Updated 3 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆35Updated 2 years ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆65Updated 8 months ago
- Extensible FPGA control platform☆60Updated 2 years ago
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- Generate Zynq configurations without using the vendor GUI☆30Updated last year
- Fabric generator and CAD tools graphical frontend☆12Updated last year
- Docker Development Environment for SpinalHDL☆20Updated 9 months ago
- cryptography ip-cores in vhdl / verilog☆40Updated 4 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆31Updated 4 years ago
- Wishbone interconnect utilities☆40Updated 3 months ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆28Updated 3 weeks ago
- Basic USB 1.1 Host Controller for small FPGAs☆89Updated 4 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl☆29Updated 4 months ago
- A padring generator for ASICs☆25Updated last year
- Demo projects for various Kintex FPGA boards☆55Updated 2 weeks ago
- FPGA250 aboard the eFabless Caravel☆29Updated 4 years ago