AEW2015 / fpga-colabLinks
FPGA examples on Google Colab
☆27Updated 4 months ago
Alternatives and similar repositories for fpga-colab
Users that are interested in fpga-colab are comparing it to the libraries listed below
Sorting:
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆19Updated 9 months ago
- Bitstream relocation and manipulation tool.☆50Updated 3 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆109Updated 2 weeks ago
- Projects published on controlpaths.com and hackster.io☆42Updated 3 years ago
- Generate Zynq configurations without using the vendor GUI☆30Updated 2 years ago
- Drawio => VHDL and Verilog☆61Updated 2 years ago
- Flip flop setup, hold & metastability explorer tool☆51Updated 3 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated last month
- A Python package for generating HDL wrappers and top modules for HDL sources☆52Updated this week
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆84Updated 2 months ago
- cryptography ip-cores in vhdl / verilog☆41Updated 4 years ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆112Updated last year
- Extensible FPGA control platform☆61Updated 2 years ago
- Demo projects for various Kintex FPGA boards☆65Updated 7 months ago
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆86Updated this week
- ☆71Updated last year
- A current mode buck converter on the SKY130 PDK☆34Updated 4 years ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆76Updated 2 weeks ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆21Updated 3 weeks ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 6 months ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 4 years ago
- Spen's Official OpenOCD Mirror☆51Updated 9 months ago
- CologneChip GateMate FPGA Module: GMM-7550☆27Updated 2 months ago
- SAR ADC on tiny tapeout☆44Updated 11 months ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆186Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆31Updated 3 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆46Updated this week
- FPGA250 aboard the eFabless Caravel☆32Updated 5 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆81Updated 5 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆102Updated last week