1Allison / 8bit-RISC-CPULinks
用verilog设计8位cpu
☆7Updated 5 years ago
Alternatives and similar repositories for 8bit-RISC-CPU
Users that are interested in 8bit-RISC-CPU are comparing it to the libraries listed below
Sorting:
- Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC(精简指令集)CPU(中央处理器)简单结构和Verilog实现。☆148Updated 6 years ago
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆84Updated 5 years ago
- CPU Design Based on RISCV ISA☆117Updated last year
- riscv指令集,单周期以及五级流水线CPU☆79Updated 6 months ago
- Uart transport + image processing + VGA display 基于FPGA的图像处理,包括Uart和VGA☆14Updated 5 years ago
- FPGA图像处理-- 车牌定位,包括二值化,腐蚀,膨胀,sobel边缘检测,水平投影和垂直投影等☆45Updated 2 years ago
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆142Updated 5 years ago
- MNIST using tensorflow, c++ and fpga (zynq7010)☆25Updated 2 years ago
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆97Updated 2 weeks ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆184Updated 8 months ago
- 我的数字IC厂库:Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆93Updated 3 years ago
- In this project, Canny edge detection, one of the efficient edge detection algorithms is implemented on a Zedboard FPGA using verilog. Th…☆21Updated 3 years ago
- AXI协议规范中文翻译版☆153Updated 3 years ago
- 基于FPGA和ov5640的实时图像采集及灰度转换系统☆16Updated last year
- FPGA实现简单的图像处理算法☆47Updated 2 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆77Updated 2 years ago
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆338Updated 2 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆29Updated 3 years ago
- some interesting demos for starters☆81Updated 2 years ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛(高云赛道)项目,题目基于高云FPGA的多路网络视频监控编码系统。☆47Updated last year
- 2023集创赛紫光同创杯一等奖项目☆119Updated last year
- 数字IC设计 学习笔记