Alternatives and similar repositories for Get-Moving-with-Pynq-on-Alveo-U50:

Users that are interested in Get-Moving-with-Pynq-on-Alveo-U50 are comparing it to the libraries listed below

• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆36Updated 4 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆41Updated 6 months ago
• PSCLab-ASU / Systolic-CNN
  ☆15Updated 4 years ago
• sfu-arch / SpGEMM
  ☆35Updated 3 years ago
• harvard-acc / ESP_Systolic_Array_Accelerator
  ☆3Updated 3 years ago
• GATECH-EIC / AutoDNNchip
  ☆70Updated 5 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆50Updated 3 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆77Updated 8 months ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆63Updated 6 years ago
• sharc-lab / FPGA_ECE8893
  ☆33Updated this week
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆48Updated last month
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆30Updated 3 years ago
• jgoeders / dac_sdc_2020
  DAC System Design Contest 2020
  ☆29Updated 4 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• wzc810049078 / systolic-array-matrix-multiplier
  A systolic array matrix multiplier
  ☆24Updated 5 years ago
• tissue3 / EyerissSimulator
  Eyeriss chip simulator
  ☆36Updated 5 years ago
• AlexMontgomerie / fpgaconvnet-model
  Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
  ☆29Updated 4 months ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆44Updated 10 months ago
• synergy-noc-generators / Proteus
  ☆9Updated 2 years ago
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆91Updated 3 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆23Updated last year
• AlexMontgomerie / fpgaconvnet-hls
  ☆28Updated 4 months ago
• awai54st / LUTNet
  ☆57Updated 4 years ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆33Updated 2 weeks ago
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• jgoeders / dac_sdc_2021
  ☆23Updated 3 years ago