Alternatives and similar repositories for TinyML-Contest-Solution

Users that are interested in TinyML-Contest-Solution are comparing it to the libraries listed below

• mit-han-lab / iccad-tinyml-open
  [ICCAD'22 TinyML Contest] Efficient Heart Stroke Detection on Low-cost Microcontrollers
  ☆15Updated 2 years ago
• EEESlab / CMix-NN
  CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices
  ☆48Updated 5 years ago
• Fiwo735 / Transformer_Neural_Network_HLS
  ☆14Updated 3 years ago
• aztc / EtinyNet
  ☆26Updated 3 years ago
• tinymlcontest / tinymlcontest2022_demo_example
  ☆26Updated 2 years ago
• cjg91 / trans-fat
  An FPGA Accelerator for Transformer Inference
  ☆92Updated 3 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆47Updated last year
• sefaburakokcu / finn-quantized-yolo
  Low-Precision YOLO on PYNQ with FINN
  ☆34Updated 2 years ago
• chuliang007 / resnet20_training
  ☆11Updated last year
• jgoeders / dac_sdc_2022
  ☆17Updated 3 years ago
• ptoupas / amd-open-hardware-23
  This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model archite…
  ☆48Updated 2 years ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated 2 years ago
• qixingzhang / SummerSchool2022-Vitis-AI
  Vitis AI Lab: MNIST classifier
  ☆19Updated 3 years ago
• eliberis / uNAS
  μNAS is a neural architecture search (NAS) system that designs small-yet-powerful microcontroller-compatible neural networks.
  ☆82Updated 4 years ago
• heymesut / SJTU_microe
  A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC
  ☆28Updated 3 years ago
• AiArtisan / dac_sdc_2022_champion
  ☆21Updated 3 years ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆74Updated 5 years ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆114Updated 4 years ago
• mean9park / BitFusion-verilog
  bitfusion verilog implementation
  ☆12Updated 3 years ago
• EEESlab / CMSIS_NN-INTQ
  INT-Q Extension of the CMSIS-NN library for ARM Cortex-M target
  ☆18Updated 5 years ago
• awai54st / Enabling-Binary-Neural-Network-Training-on-the-Edge
  ☆20Updated 3 years ago
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆95Updated 4 years ago
• sharc-lab / Edge-MoE
  Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts
  ☆132Updated last year
• sjduan / LeHDC
  ☆15Updated 9 months ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆28Updated 4 years ago
• gnodipac886 / ViT-FPGA-TPU
  FPGA based Vision Transformer accelerator (Harvard CS205)
  ☆142Updated 10 months ago
• louisliuwei / pynq-dpu
  Migrate Xilinx edge AI solution to PYNQ
  ☆17Updated 5 years ago
• GATECH-EIC / DNN-Chip-Predictor
  [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…
  ☆25Updated 3 years ago
• hguq / HG-PIPE
  FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.
  ☆112Updated 11 months ago
• MinahilRaza / Brevitas_Fixed_Point
  Quantized Training for Convolutional Neural Networks using Xilinx Brevitas
  ☆12Updated 3 years ago