echoPinkApple / bilinearLinks
Bilinear interpolation realizes image scaling based on FPGA
☆29Updated 5 years ago
Alternatives and similar repositories for bilinear
Users that are interested in bilinear are comparing it to the libraries listed below
Sorting:
- FFT implement by verilog_测试验证已通过☆58Updated 9 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆50Updated 5 years ago
- SPI interface connect to APB BUS with Verilog HDL☆39Updated 4 years ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆34Updated 3 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆69Updated last year
- AHB DMA 32 / 64 bits☆56Updated 11 years ago
- ☆38Updated 10 years ago
- ARM 中通过APB总线连接的UART模块☆69Updated 5 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆28Updated 6 years ago
- fpga跑sobel识别算法☆44Updated 4 years ago
- image processing based FPGA☆113Updated 4 years ago
- AXI总线连接器☆105Updated 5 years ago
- Pipeline FFT Implementation in Verilog HDL☆149Updated 6 years ago
- 基于FPGA的三速以太网UDP协议栈设计☆34Updated last year
- FFT implementation using CORDIC algorithm written in Verilog.☆34Updated 7 years ago
- APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS☆27Updated 2 years ago
- Open IP in Hardware Description Language.☆28Updated 2 years ago
- 视频旋转(2019FPGA大赛)☆37Updated 5 years ago
- RTL Verilog library for various DSP modules☆93Updated 3 years ago
- use Verilog HDL implemente bicubic interpolation in FPGA☆29Updated 5 years ago
- FPGA☆126Updated 5 years ago
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆93Updated 8 years ago
- SDRAM controller with AXI4 interface☆98Updated 6 years ago
- 七路图像在FPGA中实现拼接,代码会不断添加进来。☆28Updated 4 years ago
- Must-have verilog systemverilog modules☆37Updated 3 years ago
- AXI Interconnect☆54Updated 4 years ago
- Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.☆17Updated 5 years ago
- 学习AXI接口,以及xilinx DDR3 IP使用☆38Updated 8 years ago
- 在FPGA上实现SRIO收发控制器☆11Updated 3 years ago
- verilog☆21Updated 2 years ago