Bilinear interpolation realizes image scaling based on FPGA
☆33Jul 11, 2020Updated 5 years ago
Alternatives and similar repositories for bilinear
Users that are interested in bilinear are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- use Verilog HDL implemente bicubic interpolation in FPGA☆32Dec 31, 2019Updated 6 years ago
- High Throughput Image Filters on FPGAs☆14Oct 17, 2017Updated 8 years ago
- Hardware implementation of HDR image producing algorithm☆16Sep 30, 2022Updated 3 years ago
- Phased Array Radar☆13Aug 15, 2012Updated 13 years ago
- fpga i2c slave verilog hdl rtl☆16Nov 26, 2015Updated 10 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface.…☆21Oct 28, 2024Updated last year
- I2C Slave☆14Jul 17, 2014Updated 11 years ago
- FPGA video scaler running on Intel Arria 10☆12May 28, 2019Updated 6 years ago
- A dual core RISC-V processor (using PULP platform SoC) implemented on a Digilent Arty S7-50 FPGA board.☆14Aug 7, 2022Updated 3 years ago
- Simple FPGA-based Wavelet Image Compression☆15Dec 1, 2015Updated 10 years ago
- I2C ROM for EDID (Extended Display Identification Data) on FPGAs☆24Nov 13, 2015Updated 10 years ago
- Microshift Compression: An Efficient Image Compression Algorithm for Hardware☆36Apr 21, 2021Updated 5 years ago
- training SNN with Resume algorithm☆10Nov 15, 2019Updated 6 years ago
- ☆18Jun 19, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆22May 15, 2021Updated 5 years ago
- FPGA-CNN Application for fruit detection based on Logos-PGL22G Board☆14Aug 24, 2022Updated 3 years ago
- pytorchTocaffe☆11Mar 18, 2020Updated 6 years ago
- ☆15Mar 22, 2024Updated 2 years ago
- Python2 / Brian2 implementation (attempt) of Normalized Approximate Descent based Supervised Learning Rule.☆12Feb 10, 2023Updated 3 years ago
- This is the Verilog 2005 parser used by VerilogCreator☆15May 19, 2019Updated 7 years ago
- EBAZ4205 is Xilinx Zynq based mining board used in Ebang Ebit E9+ bitcoin miner machine.☆10Jan 18, 2022Updated 4 years ago
- High-performance FPGA-based JPEG codec accelerator☆13Dec 1, 2018Updated 7 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆57May 10, 2021Updated 5 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- This is a repo containing ARM-Cortex-M0 based SOC designs implemented on the Nexus-4-DDR , Nexus-4 and the ARTY - A7 FPGA platforms.☆12Sep 6, 2023Updated 2 years ago
- The code for AIM2022 compressed image super-resolution☆11Nov 30, 2022Updated 3 years ago
- 简单的未优化的SRT除法器☆12Jun 16, 2024Updated last year
- Vivado诸多IP，包括图像处理等☆234Jul 28, 2024Updated last year
- 这是俺最近搞的，可以从百度地图上爬取一些城市的地点信息和路线规划用来做旅游推荐( ﹁ ﹁ ) ~→SQL文件会在月底左右加上的( •̀ ω •́ )y☆13Aug 24, 2019Updated 6 years ago
- 基于pytorch写的CRNN文字识别~简化写法帮助入门☆13Feb 21, 2021Updated 5 years ago
- This repository is an excuse to learn about Convolutional Neural Networks by implementing one in FPGA. The main goal is to learn, and to …☆12Jul 12, 2020Updated 5 years ago
- Verilog I2C Slave☆26Aug 11, 2014Updated 11 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Feb 25, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Digital predistortion with sample selection methods.☆20Oct 1, 2019Updated 6 years ago
- Verilog Implementation of Otsu's algorithm☆14Jan 18, 2020Updated 6 years ago
- Repository gathering basic modules for CDC purpose☆61Dec 31, 2019Updated 6 years ago
- Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现☆29Mar 3, 2024Updated 2 years ago
- FPGA实现简单的图像处理算法☆81Mar 26, 2023Updated 3 years ago
- image processing based FPGA☆119Sep 2, 2021Updated 4 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 8 years ago