viktor-nikolov / Zynq-XADC-DMA-lwIPLinks
Tutorial for analog input digitalization by the Xilinx Zynq XADC utilizing the DMA and data streaming to a PC over the network.
☆12Updated 6 months ago
Alternatives and similar repositories for Zynq-XADC-DMA-lwIP
Users that are interested in Zynq-XADC-DMA-lwIP are comparing it to the libraries listed below
Sorting:
- UART in Verilog and VHDL☆13Updated 2 years ago
- OscillatorIMP ecosystem FPGA IP sources☆28Updated 2 weeks ago
- Single Port RAM, Dual Port RAM, FIFO☆25Updated 3 years ago
- Wishbone controlled I2C controllers☆50Updated 7 months ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆57Updated 11 months ago
- This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.☆18Updated 2 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆27Updated 5 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆66Updated 3 years ago
- Adapter board exposing SATA M.2 SSD on FMC board-to-board connector☆12Updated last year
- STM32F407 + Spartan6 combo with high speed USB TMC interface☆29Updated 5 years ago
- Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board☆17Updated 3 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆32Updated 4 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆54Updated 2 years ago
- An HDL design for sending data over Ethernet☆44Updated 2 years ago
- A collection of phase locked loop (PLL) related projects☆106Updated last year
- Control a MIPI Camera over I2C☆22Updated 5 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆64Updated 5 years ago
- Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application☆53Updated last year
- SDRAM controller for MIPSfpga+ system☆23Updated 4 years ago
- A Time to Digital Converter designed for Xilinx 7-Series FPGAs☆28Updated 4 years ago
- Basic USB-CDC device core (Verilog)☆80Updated 4 years ago
- USB interface for FPGA using a the Cypress FX3☆16Updated 5 years ago
- A collection of Opal Kelly provided design resources☆16Updated 3 months ago
- Ethernet MAC 10/100 Mbps☆27Updated 3 years ago
- 基于Kintex-7 XC7K325T的高性能FPGA功能验证板☆19Updated 5 years ago
- 4-Layer XC7Z010 DDR3 Layout☆17Updated 3 years ago
- A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample dat…☆22Updated 4 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆72Updated last year
- turbo 8051☆29Updated 7 years ago
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆51Updated 2 weeks ago