Alternatives and similar repositories for simple-vgg16

Users that are interested in simple-vgg16 are comparing it to the libraries listed below

• ONNC / onnc-tutorial
  ☆58Updated 3 years ago
• CoffeeBeforeArch / nvbit_tools
  ☆11Updated 4 years ago
• zeasa / nvdla-compiler
  ☆44Updated 5 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆79Updated 9 months ago
• ucb-bar / onnxruntime-riscv
  Fork of upstream onnxruntime focused on supporting risc-v accelerators
  ☆86Updated 2 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆40Updated 9 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year
• GATECH-EIC / AutoDNNchip
  ☆70Updated 5 years ago
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆115Updated 3 months ago
• LeiWang1999 / nvdla_loadables
  some sample caffemodel, prototxt, test images and pre compiled loadabes .
  ☆12Updated 4 years ago
• jinhachung / tptpu-sim
  A Toy-Purpose TPU Simulator
  ☆18Updated 11 months ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated 2 years ago
• ehw-fit / tf-approximate
  Approximate layers - TensorFlow extension
  ☆27Updated last month
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆121Updated 2 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆21Updated 3 years ago
• escalab / GPTPU
  GPTPU for SC 2021
  ☆51Updated 2 years ago
• neurosim / DNN_NeuroSim_V1.3
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆68Updated last year
• StanfordAHA / aha
  ☆58Updated this week
• xupgit / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆69Updated 6 years ago
• JunningWu / AIChip
  Aiming at an AI Chip based on RISC-V and NVDLA.
  ☆20Updated 7 years ago
• harvard-acc / EdgeBERT
  HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference
  ☆48Updated last year
• leo47007 / TPU-Tensor-Processing-Unit
  IC implementation of TPU
  ☆124Updated 5 years ago
• Xilinx / mlir-xten
  ☆15Updated last week
• accel-sim / gpu-app-collection
  A repository where GPU applications are aggregated using a common build flow that supports multiple CUDA versions.
  ☆64Updated this week
• howjmay / neon2rvv
  A translator from ARM NEON intrinsics to RISCV-V Extension implementation
  ☆32Updated 8 months ago
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆40Updated 7 months ago
• he-actlab / polymath
  ☆21Updated 2 months ago
• meton-robean / PaperNotes
  记录阅读各类paper的想法笔记（关注体系结构，机器学习系统，深度学习，计算机视觉）
  ☆24Updated 5 years ago
• nycu-caslab / TinyTS
  This is the open-source version of TinyTS. The code is dirty so far. We may clean the code in the future.
  ☆16Updated 10 months ago
• TF2-Engine / TF2
  An Open Source Deep Learning Inference Engine Based on FPGA
  ☆158Updated 4 years ago