tianxiaogua / FPGA-Robot

Related projects ⓘ

Alternatives and complementary repositories for FPGA-Robot

• yuezhao1 / ANLU_fpga
  使用国产FPGA厂商安路公司的开发板做的一款基于FPGA的智能导盲杖系统。利用百度LBS开放平台做到自主导航，与Arduino互联实现PID算法，摄像头识别红绿灯，超声波自主避障，语音识别，一键拨打紧急联系人等等
  ☆21Updated 4 years ago
• C-H-Chien / FPGA_SIFT-LES
  Integration of SIFT and LES Algorithms
  ☆11Updated 6 months ago
• Lydaidai / The-car-base-on-FPGA
  开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…
  ☆12Updated 5 years ago
• txzing / modbus_crc_verilog
  FPGA纯逻辑实现modbus通信
  ☆16Updated 2 years ago
• Noris4est / I2C-FPGA-Verilog-HDL
  In this project, I am developing an I2C interface (IIC, TWI) for the FPGA platform. In this project I use the Verilog HDL digital hardwar…
  ☆12Updated 4 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆23Updated 3 years ago
• jefferie / digital_recognition
  利用ov5640摄像头采集图像，利用4.3寸RGB屏显示捕获到的数字，并将识别到的数字显示在数码管上。
  ☆12Updated 4 years ago
• markos-stefanidis / FPGA-Based-HDR-algorithm
  Hardware implementation of HDR image producing algorithm
  ☆15Updated 2 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆35Updated 8 years ago
• falwat / code_repo
  My code repositry for common use.
  ☆20Updated 2 years ago
• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆23Updated 10 months ago
• Archit-halder / Viterbi-Algorithm
  This is about the implementation of (2,1,4) Convolutional Encoder and Viterbi Decoder using Verilog VHDL.
  ☆11Updated 4 years ago
• DeamonYang / FPGA_SDR
  软件无线电，使用FPGA进行正交解调。
  ☆18Updated 5 years ago
• cterrill26 / FPGA_AudioVisualizer
  Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…
  ☆14Updated 4 years ago
• wgq18 / img_defog
  一种基于FPGA平台的实时视频去雾系统项目代码，其中bit流文件可以直接下载到PYNQ-Z2开发板上，通过usb和hdmi设备输入有雾视频，将去雾后的视频输出到显示屏上。c++源代码部分是我们的去雾IP核的源代码。
  ☆18Updated 4 years ago
• Yongxiang-Guo / Verilog_spi_flash
  SPI通信实现FLASH读写
  ☆13Updated 4 years ago
• xycfwrj / zynq_axi_ddr_barebone
  minimal code to access ps DDR from PL
  ☆19Updated 5 years ago
• visky2096 / AHB-to-I2C
  Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…
  ☆20Updated 5 years ago
• BigPig-Bro / Cyclone-IV
  【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板
  ☆17Updated 11 months ago
• WzyNoEmo / video-capture-and-process
  This project aims to integrate image acquisition with AI acceleration to achieve functions such as multi-channel video source input captu…
  ☆15Updated last year
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆44Updated 5 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆39Updated 11 months ago
• DeamonYang / FPGA_FFT
  基于FPGA的FFT
  ☆12Updated 5 years ago
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆33Updated 2 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆45Updated 2 years ago
• JoseIuri / UVM_Python_UVMC
  This repository contains an example of the connection between an UVM Testbench and a Python reference model using UVM Connect from Mentor…
  ☆14Updated 4 years ago
• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 6 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆35Updated 7 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆46Updated 4 years ago