tharunchitipolu / sobel-edge-detectorLinks
Sobel is first order or gradient based edge operator for images and it is implemented using verilog.
☆14Updated 4 years ago
Alternatives and similar repositories for sobel-edge-detector
Users that are interested in sobel-edge-detector are comparing it to the libraries listed below
Sorting:
- 关于数字IC的笔试面试题☆9Updated 5 years ago
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车,分为两个部分,控制器部分和小车部分,通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势,从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Updated 6 years ago
- This repo is to inplemente the riscv soc on the xilinx pynq-z2 board☆11Updated last year
- 数字IC验证案例(SV and UVM)☆26Updated 4 years ago
- HW and SW based implementation of Canny Edge Detection Algorithm.☆12Updated 7 years ago
- Hardware implementation of HDR image producing algorithm☆16Updated 2 years ago
- Verilog implementation of different concepts in Digital Logic Design such as OTHFSM, AFG and Accelerators☆10Updated last year
- In this project, I am developing an I2C interface (IIC, TWI) for the FPGA platform. In this project I use the Verilog HDL digital hardwar…☆18Updated 5 years ago
- wifi☆11Updated 8 years ago
- Digital IC design and vlsi notes☆12Updated 5 years ago
- DSP University Project - Matlab, Simulations, and Verilog Files☆11Updated 5 years ago
- 使用FPGA制作机器人,并使用python建立上位机,FPGA机器人通过控制ESP8266通过WiFi进行无线通讯,来达到上位机控制FPGA机器人的目的