Alternatives and similar repositories for riscv-fpga:

Users that are interested in riscv-fpga are comparing it to the libraries listed below

• tomverbeure / vexriscv_ocd_blog
  Repo that shows how to use the VexRiscv with OpenOCD and semihosting.
  ☆24Updated 3 years ago
• DongshanPI / DongshanPI-D1s_BareMetal
  国产全志平头哥C906 RISC-V DongshanPI-D1s RV64GVC 裸机示例仓库！
  ☆11Updated 10 months ago
• nucleisys / n200-doc
  Deprecated, no longer updated, please change to https://www.nucleisys.com/index.php
  ☆25Updated 4 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆23Updated 3 years ago
• wuhanstudio / picorv32_tang
  A 32-bit RISC-V SoC on FPGA that supports RT-Thread.
  ☆26Updated last year
• CospanDesign / nysa-sdio-device
  SDIO Device Verilog Core
  ☆22Updated 6 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆21Updated 10 years ago
• CospanDesign / sdio-device
  ☆17Updated 6 years ago
• pulp-platform / jtag_dpi
  JTAG DPI module for SystemVerilog RTL simulations
  ☆27Updated 9 years ago
• Elphel / x393_sata
  mirror of https://git.elphel.com/Elphel/x393_sata
  ☆33Updated 4 years ago
• esynr3z / usb20dev
  USB 2.0 FS Device controller IP core written in SystemVerilog
  ☆35Updated 6 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆37Updated 3 years ago
• watz0n / arty_xjtag
  Xilinx JTAG Toolchain on Digilent Arty board
  ☆16Updated 7 years ago
• ultraembedded / core_mmc
  MMC (and derivative standards) host controller
  ☆23Updated 4 years ago
• freecores / turbo8051
  turbo 8051
  ☆29Updated 7 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆25Updated 3 years ago
• FDU-ME-ARC / NVMeCHA
  ☆14Updated 3 years ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated 10 months ago
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆35Updated last year
• siorpaes / SimpleSoC
  Very simple Cortex-M1 SoC design based on ARM DesignStart
  ☆17Updated 3 years ago
• corundum / verilog-pcie
  Verilog PCI express components
  ☆22Updated last year
• dpiegdon / verilog-can
  Verilog CAN controller that is compatible to the SJA 1000.
  ☆12Updated 3 years ago
• RoaLogic / adv_dbg_if
  Universal Advanced JTAG Debug Interface
  ☆17Updated 10 months ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆56Updated last month
• rbarzic / nanorv32
  A small 32-bit implementation of the RISC-V architecture
  ☆32Updated 4 years ago
• DUNE / pl-nvme
  ☆29Updated 4 years ago
• ved-rivos / iommu-rtl
  RISC-V IOMMU in verilog
  ☆17Updated 2 years ago
• subutai-attic / pars
  ☆29Updated 7 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆22Updated 6 years ago
• giuseppedongiovanni / nvme_comp_storage
  Computational Storage Device based on the open source project OpenSSD.
  ☆20Updated 4 years ago