The open-source Zynq 7000 BSP generator for openXC7
☆65Jan 21, 2025Updated last year
Alternatives and similar repositories for GenZ
Users that are interested in GenZ are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- nMigen examples for the ULX3S board☆12May 5, 2022Updated 4 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆120Oct 5, 2026Updated 2 weeks ago
- Demo projects for various Kintex FPGA boards☆71Updated this week
- Open source Logic Analyzer based on LiteX SoC☆27Apr 12, 2025Updated last year
- Nitro HUB75 LED panel driver FPGA core☆32Jun 11, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆102Updated this week
- ☆118Jan 22, 2023Updated 3 years ago
- Nix flake for openXC7☆62Oct 5, 2026Updated 2 weeks ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- Native Rust implementation of the FST waveform format from GTKWave.☆15Oct 13, 2026Updated last week
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- ☆19Mar 25, 2023Updated 3 years ago
- Experimental flows using nextpnr for Xilinx devices☆271Oct 11, 2024Updated 2 years ago
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆26Feb 25, 2025Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- 👾 Design ∪ Hardware☆79Sep 17, 2026Updated last month
- assorted library of utility cores for amaranth HDL☆105Sep 17, 2024Updated 2 years ago
- fcapz: Open-source, vendor-agnostic full-featured FPGA debug cores. Embedded Logic analyzer, Embedded I/O and Embedded JTAG-AXI☆129Updated this week
- Small 32-bit RISC-V CPU with a half-width datapath inspired by the 68000☆16Dec 21, 2023Updated 2 years ago
- An open source replacement of the Xilinx bootgen application.☆122Sep 15, 2026Updated last month
- Benchmarking GNSS system at the Xilinx PYNQ FPGA based platform☆16Apr 26, 2024Updated 2 years ago
- A CUDA C++ Lib to run multiple independent DDC☆17Feb 1, 2024Updated 2 years ago
- Xilinx virtual cable server for generic FTDI 4232H.☆65Feb 9, 2024Updated 2 years ago
- Easy SMT solver interaction☆36Feb 3, 2026Updated 8 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- System on Chip toolkit for nMigen☆19Apr 29, 2020Updated 6 years ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆107Aug 28, 2025Updated last year
- Archived - development continues at openXC7/nextpnr☆71Sep 25, 2026Updated 3 weeks ago
- ☆15Sep 13, 2024Updated 2 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 4 years ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjcombine/] An FPGA reverse engineering and documentation project☆66Mar 12, 2026Updated 7 months ago
- Buildroot config for EBAZ4205☆19Feb 18, 2021Updated 5 years ago
- Prefix tree adder space exploration library☆57Jan 27, 2026Updated 8 months ago
- Bluespec environment for working with the ulx3s board and its lattice ecp5 fpga☆15Mar 9, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- basic example of litex on colorLight 5A-75B based on fpga_101/lab004☆39Jan 11, 2023Updated 3 years ago
- Open source RTL simulation acceleration on commodity hardware☆37Apr 13, 2023Updated 3 years ago
- Siglent SDS1x0xX-E FPGA bitstreams☆49Dec 24, 2024Updated last year
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- Bit streams forthe Ulx3s ECP5 device☆19Apr 9, 2023Updated 3 years ago
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆95Mar 12, 2026Updated 7 months ago
- Miscellaneous ULX3S examples (advanced)☆88Feb 7, 2026Updated 8 months ago