regymm / GenZLinks
The open-source Zynq 7000 BSP generator for openXC7
☆51Updated last year
Alternatives and similar repositories for GenZ
Users that are interested in GenZ are comparing it to the libraries listed below
Sorting:
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- assorted library of utility cores for amaranth HDL☆100Updated last year
- System on Chip toolkit for Amaranth HDL☆98Updated last year
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 7 months ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102Updated 2 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated last year
- An FPGA reverse engineering and documentation project☆64Updated last week
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆31Updated last week
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆146Updated last week
- Board definitions for Amaranth HDL☆122Updated 5 months ago
- Experimental flows using nextpnr for Xilinx devices☆54Updated 2 months ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 8 months ago
- RISC-V Processor written in Amaranth HDL☆39Updated 4 years ago
- Nix flake for openXC7☆45Updated 9 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆87Updated 3 months ago
- EVEREST: e-Versatile Research Stick for peoples☆36Updated 2 years ago
- LiteX development baseboards arround the SQRL Acorn.☆73Updated 10 months ago
- End-to-end synthesis and P&R toolchain☆94Updated last month
- Small footprint and configurable embedded FPGA logic analyzer☆198Updated last week
- 妖刀夢渡☆63Updated 6 years ago
- Project X-Ray Database: XC7 Series☆74Updated 4 years ago
- Another size-optimized RISC-V CPU for your consideration.☆58Updated 3 weeks ago
- Board and connector definition files for nMigen☆30Updated 5 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated 2 months ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated 2 years ago
- I want to learn [n]Migen.☆44Updated 6 years ago
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆91Updated last year
- Industry standard I/O for Amaranth HDL☆31Updated last year
- Experiments with Yosys cxxrtl backend☆50Updated last year
- Nitro USB FPGA core☆86Updated last year