regymm / GenZLinks
The open-source Zynq 7000 BSP generator for openXC7
☆37Updated 5 months ago
Alternatives and similar repositories for GenZ
Users that are interested in GenZ are comparing it to the libraries listed below
Sorting:
- User-friendly explanation of Yosys options☆113Updated 3 years ago
- assorted library of utility cores for amaranth HDL☆92Updated 9 months ago
- I want to learn [n]Migen.☆42Updated 5 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆97Updated 2 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆22Updated this week
- Experimental flows using nextpnr for Xilinx devices☆48Updated 2 weeks ago
- 妖刀夢渡☆59Updated 6 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated 6 months ago
- Siglent SDS1x0xX-E FPGA bitstreams☆41Updated 6 months ago
- Low-cost ECP5 FPGA development board☆77Updated 4 years ago
- KiCad symbol library for sky130 and gf180mcu PDKs☆32Updated last year
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆46Updated last year
- Miscellaneous ULX3S examples (advanced)☆78Updated this week
- Board definitions for Amaranth HDL☆117Updated 2 months ago
- Documenting Lattice's 28nm FPGA parts☆143Updated last year
- System on Chip toolkit for Amaranth HDL☆91Updated 8 months ago
- Nix flake for openXC7☆40Updated 2 months ago
- Tiny tips for Colorlight i5 FPGA board☆57Updated 4 years ago
- Experiments with Yosys cxxrtl backend☆49Updated 5 months ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆64Updated 3 weeks ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆79Updated last year
- RISC-V Processor written in Amaranth HDL☆38Updated 3 years ago
- Industry standard I/O for Amaranth HDL☆28Updated 8 months ago
- PicoRV☆44Updated 5 years ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆66Updated last week
- This repository contains iCEBreaker examples for Amaranth HDL.☆38Updated last year
- USB virtual model in C++ for Verilog☆31Updated 8 months ago
- Generate Zynq configurations without using the vendor GUI☆30Updated last year
- My pergola FPGA projects☆30Updated 4 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆65Updated 8 months ago