TheMightyDuckOfDoom / liberty74Links
A Fully Open-Source Verilog-to-PCB Flow
☆26Updated last year
Alternatives and similar repositories for liberty74
Users that are interested in liberty74 are comparing it to the libraries listed below
Sorting:
- ☆72Updated last year
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆77Updated last month
- Re-coded Gowin GW1N primitives for Verilator use☆20Updated 3 years ago
- Demo projects for various Kintex FPGA boards☆65Updated 8 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆86Updated 3 months ago
- A Risc-V SoC for Tiny Tapeout☆44Updated last month
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆35Updated 10 months ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated 2 months ago
- CologneChip GateMate FPGA Module: GMM-7550☆27Updated this week
- Portable HyperRAM controller☆62Updated last year
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆22Updated 2 years ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆152Updated 9 months ago
- Wishbone interconnect utilities☆44Updated last month
- Convert an image to a GDS format for inclusion in a zerotoasic project☆17Updated 3 years ago
- RISC-V Processor written in Amaranth HDL☆39Updated 4 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 6 months ago
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Flip flop setup, hold & metastability explorer tool☆51Updated 3 years ago
- assorted library of utility cores for amaranth HDL☆100Updated last year
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆111Updated last month
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆31Updated last week
- ☆38Updated last year
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆67Updated 2 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- Miscellaneous ULX3S examples (advanced)☆82Updated 6 months ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated 4 months ago
- Generate Zynq configurations without using the vendor GUI☆30Updated 2 years ago
- The first-ever opensource RTL core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers; With stan…☆53Updated 2 weeks ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆186Updated last year
- Set up your GitHub Actions workflow with a OSS CAD Suite☆16Updated last year