Alternatives and similar repositories for verilog-spi

Users that are interested in verilog-spi are comparing it to the libraries listed below

• andrade824 / Verilog-SPI-Master
  A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen
  ☆19Updated 10 years ago
• dirjud / Nitro-Parts-lib-SPI
  Verilog SPI master and slave
  ☆57Updated 9 years ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆75Updated 2 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 5 years ago
• Digilent / digilent-vivado-scripts
  ☆69Updated 4 months ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆64Updated 5 years ago
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆70Updated 3 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆84Updated 2 years ago
• mitya1337 / Simple_I2C
  Simple implementation of I2C interface written on Verilog and SystemC
  ☆42Updated 7 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆84Updated 5 years ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆142Updated 3 years ago
• freecores / 8051
  8051 core
  ☆107Updated 11 years ago
• janschiefer / verilog_spi
  A simple Verilog SPI master / slave implementation featuring all 4 modes.
  ☆58Updated 4 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆68Updated 7 years ago
• AngeloJacobo / FPGA_OV7670_Camera_Interface
  Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps
  ☆64Updated 3 years ago
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆35Updated 7 years ago
• viktor-nikolov / MicroBlaze-DDR3-tutorial
  Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application
  ☆55Updated last week
• q3k / zturn-stuff
  Migrated to Codeberg
  ☆92Updated 8 years ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆63Updated 2 years ago
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆56Updated 5 years ago
• NXP / i3c-slave-design
  MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
  ☆130Updated 5 years ago
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆115Updated last year
• xfguo / spi
  SPI Master Core clone from OpenCores
  ☆11Updated 11 years ago
• westonb / OV7670-Verilog
  Verilog modules required to get the OV7670 camera working
  ☆72Updated 6 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆66Updated 2 months ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆39Updated 3 years ago
• hypernyan / eth_vlg
  ☆70Updated 3 years ago
• k0nze / zedboard_axi4_master_burst_example
  Quick Example how to generate an custom AXI4 IP with AXI4-Full interface (burst) for the Zynq (ZedBoard)
  ☆44Updated 8 years ago
• louisliuwei / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆39Updated 5 years ago