mustafabbas / ECE1373_2016_hft_on_fpga
High Frequency Trading using Vivado HLS
☆138Updated 7 years ago
Alternatives and similar repositories for ECE1373_2016_hft_on_fpga
Users that are interested in ECE1373_2016_hft_on_fpga are comparing it to the libraries listed below
Sorting:
- RTL design for a nasdaq compatible high frequency trading low level. Supports itch on moldudp64.☆41Updated last year
- Use NetFPGA SUME to implement HFT Machine based on TWSE Stock Server☆27Updated 6 years ago
- The High-Frequency Trading FPGA System is an ultra-low latency platform for electronic trading on FPGAs. It features a TCP/IP stack, orde…☆97Updated last year
- RTL implementation of the low latency ethernet modules for the NASDAQ HFT FPGA project.☆36Updated last year
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆125Updated 3 years ago
- Ethernet 10GE MAC☆45Updated 10 years ago
- Hardware design project of the FIX and TCP/IP offload engines on FPGA, containing HDL codes and Python codes for testing.☆15Updated last year
- The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.☆50Updated 6 years ago
- 100 Gbps TCP/IP stack for Vitis shells☆208Updated last year
- ☆46Updated 5 years ago
- Example designs for FPGA Drive FMC☆246Updated 4 months ago
- Verilog Content Addressable Memory Module☆106Updated 3 years ago
- PCI express simulation framework for Cocotb☆161Updated 2 weeks ago
- 10G Low Latency Ethernet☆53Updated last year
- Open source FPGA-based NIC and platform for in-network compute☆194Updated last year
- AXI interface modules for Cocotb☆257Updated last year
- VNx: Vitis Network Examples☆149Updated 9 months ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆21Updated 5 years ago
- RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.☆26Updated last year
- AXI4 and AXI4-Lite interface definitions☆93Updated 4 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆151Updated 10 months ago
- Small-scale Tensor Processing Unit built on an FPGA☆183Updated 5 years ago
- HackerRank test solutions for FPGA engineer interview at Optiver☆9Updated 4 years ago
- Gigabit MAC + UDP/TCP/IP offload Engine☆31Updated 5 years ago
- System-Veilog Packet Library to configure, randomize, pack/unpack, copy, compare/display different headers☆74Updated 6 years ago
- Implement a bitonic sorting network on FPGA☆44Updated 3 years ago
- 国产VU13P加速卡资料☆73Updated 2 months ago
- Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)☆23Updated 6 months ago
- Convert json descriptions of quant algorithms to verilog HDL.☆12Updated 4 years ago
- Various Notes and Tutorials☆19Updated 8 months ago