mustafabbas / ECE1373_2016_hft_on_fpga

Related projects ⓘ

Alternatives and complementary repositories for ECE1373_2016_hft_on_fpga

• nckubugman / NetFPGA-SUME-High-Frequency-Trading-Machine
  Use NetFPGA SUME to implement HFT Machine based on TWSE Stock Server
  ☆26Updated 5 years ago
• Essenceia / Nasdaq-HFT-FPGA
  RTL design for a nasdaq compatible high frequency trading low level. Supports itch on moldudp64.
  ☆28Updated 10 months ago
• muditbhargava66 / High-Frequency-Trading-FPGA-System
  The High-Frequency Trading FPGA System is an ultra-low latency platform for electronic trading on FPGAs. It features a TCP/IP stack, orde…
  ☆57Updated 6 months ago
• Essenceia / low-latency-ethernet
  RTL implementation of the low latency ethernet modules for the NASDAQ HFT FPGA project.
  ☆22Updated 10 months ago
• fpgasystems / Vitis_with_100Gbps_TCP-IP
  100 Gbps TCP/IP stack for Vitis shells
  ☆184Updated 6 months ago
• Xilinx / HLS_packet_processing
  ☆45Updated 4 years ago
• hpcn-uam / Limago
  Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
  ☆122Updated 3 years ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆44Updated 10 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆101Updated 2 years ago
• Essenceia / ethernet-physical-layer
  RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.
  ☆19Updated 10 months ago
• huaweicloud / huaweicloud-fpga
  The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.
  ☆50Updated 5 years ago
• fpgasystems / davos
  Distributed Accelerator OS
  ☆60Updated 2 years ago
• Xilinx / xup_vitis_network_example
  VNx: Vitis Network Examples
  ☆137Updated 3 months ago
• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆47Updated 8 years ago
• ucsdsysnet / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆178Updated 6 months ago
• suisuisi / Accelerating-CNN-with-FPGA
  This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.
  ☆15Updated 4 years ago
• aquaxis / gemac
  Gigabit MAC + UDP/TCP/IP offload Engine
  ☆31Updated 5 years ago
• alexforencich / cocotbext-pcie
  PCI express simulation framework for Cocotb
  ☆139Updated 11 months ago
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆68Updated 6 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆40Updated last year
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆90Updated this week
• taichi-ishitani / tnoc
  Network on Chip Implementation written in SytemVerilog
  ☆157Updated 2 years ago
• embedeep / FREE-TPU-V3plus-for-FPGA
  FREE TPU V3plus for FPGA is the free version of a commercial AI processor (EEP-TPU) for Deep Learning EDGE Inference
  ☆108Updated last year
• ATaylorCEngFIET / Getting-to-Know-Vivado
  Source files for Getting to Know Vivado course
  ☆19Updated 4 years ago
• fpgadeveloper / fpga-drive-aximm-pcie
  Example designs for FPGA Drive FMC
  ☆218Updated last week
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆49Updated 4 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆38Updated 4 years ago
• fpgasystems / fpga-network-stack
  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
  ☆753Updated 6 months ago
• john9636 / SortingNetwork
  Implement a bitonic sorting network on FPGA
  ☆38Updated 3 years ago
• cisco / exanic-software
  ExaNIC drivers, utilities and development libraries
  ☆144Updated 5 months ago