jkelley / irig-decoder
Firmware IRIG-B decoder
☆24Updated 2 years ago
Alternatives and similar repositories for irig-decoder:
Users that are interested in irig-decoder are comparing it to the libraries listed below
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习 和总结☆22Updated 5 years ago
- 8b10b Encoder/Decoder☆11Updated 10 years ago
- ☆30Updated 5 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆49Updated 2 years ago
- FPGA Technology Exchange Group相关文件管理☆44Updated last week
- (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…☆88Updated 6 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆70Updated 2 years ago
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- I2C Master and Slave☆33Updated 9 years ago
- Gigabit Ethernet UDP communication driver☆75Updated 5 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆69Updated 10 months ago
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆46Updated 3 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- fpga i2c slave verilog hdl rtl☆13Updated 9 years ago
- asynchronous FIFO that support Non-symmetric aspect ratios(different read and write data widths), First-Word Fall-Through and data counte…☆17Updated last year
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆56Updated 5 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆35Updated 3 years ago
- Test SRIO connection between FPGA (Kintex-7) and DSP (C6678)☆17Updated 7 years ago
- JESD204b modules in VHDL☆29Updated 6 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆91Updated 8 months ago
- 视频旋转(2019FPGA大赛)☆33Updated 4 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆55Updated 2 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆65Updated 3 years ago
- Hardware Assisted IEEE 1588 IP Core☆28Updated 10 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆50Updated 3 years ago
- ☆67Updated 3 years ago
- RTL Verilog library for various DSP modules☆86Updated 3 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆52Updated last year
- AD7606 driver verilog☆40Updated 5 years ago
- Hardware Viterbi Decoder in verilog☆25Updated 5 years ago