8b10b Encoder/Decoder
☆13Jul 17, 2014Updated 12 years ago
Alternatives and similar repositories for 8b10b_encdec
Users that are interested in 8b10b_encdec are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Must-have verilog systemverilog modules☆39May 1, 2022Updated 4 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆25Dec 10, 2019Updated 6 years ago
- Modular Verilog PCIexpress Interface Components with complete MyHDL Testbench for FPGA deployment☆14Sep 17, 2019Updated 6 years ago
- 将 Verilog 设计规范、流水线模式与 FPGA 优化笔记结构化为可查询的本地知识库，供本地智能代理或脚本检索并返回带出处的实现建议与示例代码。☆18May 23, 2026Updated 2 months ago
- 新一代北斗卫星导航信号监测接收机仿真代码☆14May 17, 2016Updated 10 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- ROS/ROS2 driver for SwiftNav Duro Inertial GPS / GNSS receivers☆17Jun 15, 2026Updated last month
- AXI4-Stream FIR filter IP☆20Nov 4, 2022Updated 3 years ago
- FPGAandLAN☆29Jun 13, 2021Updated 5 years ago
- 为了学习UVM验证相关知识，需要动手尝试实际的项目。作为一个初学者，难以接触到实际的项目，于是我从夏宇闻老师的《Verilog数字系统设计教程》一书中，挑选出一个简单的小设计，作为我的验证对象，并围绕它编写了UVM验证环境。☆26Oct 9, 2020Updated 5 years ago
- hdmi-ts Project☆13Jun 11, 2017Updated 9 years ago
- Hogge Phase EMFI Detector☆15Jun 16, 2021Updated 5 years ago
- 新一代北斗卫星导航监测接收机的FPGA实现☆31May 17, 2016Updated 10 years ago
- Verilog CAN controller that is compatible to the SJA 1000.☆18Apr 17, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Implement a bitonic sorting network on FPGA☆50Nov 6, 2021Updated 4 years ago
- ☆20Jul 6, 2023Updated 3 years ago
- Verilog code for scanning a four by four matrix keypad.☆13May 26, 2021Updated 5 years ago
- Full duplex version of https://github.com/KastnerRG/riffa/issues/30☆27Oct 23, 2018Updated 7 years ago
- image processing based FPGA☆120Sep 2, 2021Updated 4 years ago
- 2019年全国大学生电子设计大赛G题双路语音调频接收机的FPGA全实现☆17Apr 15, 2020Updated 6 years ago
- Basic Simulink Blocks for modeling CDRs and PLLs☆16Apr 25, 2020Updated 6 years ago
- MATLAB Vision HDL☆16Jan 17, 2020Updated 6 years ago
- Various utilities for working with FPGAs☆13Mar 30, 2016Updated 10 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- FPGA☆130Apr 1, 2020Updated 6 years ago
- FIFO implementation with different clock domains for read and write.☆16Aug 17, 2021Updated 4 years ago
- 16-Point FFT is developed in order to accurately model that of the MATLAB function. . The module successfully tested using verilog testbe…☆19May 27, 2016Updated 10 years ago
- Parallel Redundancy Protocol (PRP version 1) software implementation☆14Apr 28, 2021Updated 5 years ago
- ECE563 Final Project - FPGA based camera tracking☆18Dec 17, 2013Updated 12 years ago
- Vivado诸多IP，包括图像处理等☆233Jul 28, 2024Updated 2 years ago
- 帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目☆37Apr 17, 2022Updated 4 years ago
- 简易的flash模拟eeprom程序，支持磨损平衡，支持掉电安全☆17Dec 22, 2021Updated 4 years ago
- Verilog Ethernet components for FPGA implementation☆25Jun 26, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。☆41Sep 18, 2024Updated last year
- LiteOS kernel for devices with few resources| such as the MCU | 适用于MCU等各种资源极小设备的LiteOS内核☆29Updated this week
- SDIO Device Verilog Core☆24Jul 25, 2018Updated 8 years ago
- ☆21Dec 31, 2021Updated 4 years ago
- ProfiBus-DP to TCP/IP Ethernet☆25Mar 21, 2017Updated 9 years ago
- Verilog PCI express components☆27Jun 26, 2023Updated 3 years ago
- An ansible role which configures time synchronization☆69Updated this week