The ROHD Verification Framework is a hardware verification framework built upon ROHD for building testbenches.
☆47Oct 7, 2025Updated 6 months ago
Alternatives and similar repositories for rohd-vf
Users that are interested in rohd-vf are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Cosimulation for the Rapid Open Hardware Development (ROHD) framework with other simulators☆29Jun 17, 2025Updated 9 months ago
- A hardware component library developed with ROHD.☆112Mar 6, 2026Updated last month
- The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming languag…☆474Jan 18, 2026Updated 2 months ago
- Parametrized RTL benchmark suite☆25Feb 6, 2026Updated 2 months ago
- Simple UVM testbench development using the uvmtb_template files☆24Jan 16, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- ☆10Nov 2, 2023Updated 2 years ago
- Verilog VPI module to dump FST (Fast Signal Trace) databases☆20Sep 19, 2023Updated 2 years ago
- A Python package for testing hardware (part of the magma ecosystem)☆47Mar 11, 2024Updated 2 years ago
- RISC-V BSV Specification☆23Jan 18, 2020Updated 6 years ago
- 16 bit RISC-V proof of concept☆25Jan 5, 2026Updated 3 months ago
- ☆42Mar 9, 2026Updated last month
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 8 months ago
- RISC-V Formal in Chisel☆13Apr 9, 2024Updated 2 years ago
- Tutorials and example code for SAMD21 and SAMD51 microcontrollers☆10Aug 5, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- PMOD PCB with USB-to-UART converter and IMU (MPU-6050, I2C) for FPGAs.☆15Jul 6, 2021Updated 4 years ago
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆597Jan 3, 2026Updated 3 months ago
- Tool to generate documentation for Nelua source files.☆10Dec 11, 2021Updated 4 years ago
- VeRLPy is an open-source python library developed to improve the digital hardware verification process by using Reinforcement Learning (R…☆31Oct 5, 2022Updated 3 years ago
- A RISC-V processor written in BSV, based on the Flute core. Has support for integrating tightly-coupled accelerators, and for integrating…☆24Oct 1, 2022Updated 3 years ago
- Embedded UVM (D Language port of IEEE UVM 1.0)☆34Nov 6, 2025Updated 5 months ago
- RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set☆15Jan 14, 2021Updated 5 years ago
- A repository for exploring LLM-assisted code conversion to TL-Verilog.☆15Feb 20, 2026Updated last month
- A Z80 CPU implemented in Chisel.☆11Sep 20, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- WebCL conformance tests☆20Feb 9, 2018Updated 8 years ago
- A fork of Yosys that integrates the CellIFT pass☆13Jul 23, 2025Updated 8 months ago
- The Linux Foundation/Redwood EDA "Building a RISC-V CPU" Course content, also available via EdX.☆18Jul 9, 2024Updated last year
- VIP-Bench benchmarks for evaluating secure computation frameworks (e.g., HE, MPC, SE, etc...)☆13Jun 9, 2023Updated 2 years ago
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- A roleplayer's forum software☆13Aug 1, 2024Updated last year
- System on Chip toolkit for Amaranth HDL☆100Mar 3, 2026Updated last month
- Hoddarla is an OS project in Golang targeting RISC-V 64-bit system.☆12Oct 28, 2021Updated 4 years ago
- ☆10Oct 8, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)☆20Sep 15, 2017Updated 8 years ago
- A Formal Verification Framework for Chisel☆19Apr 9, 2024Updated 2 years ago
- A RISC-V assembler library for Scala/Chisel HDL projects☆16Mar 27, 2026Updated 2 weeks ago
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Feb 25, 2023Updated 3 years ago
- FuseSoC standard core library☆160Mar 11, 2026Updated last month
- ☆52Oct 30, 2021Updated 4 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago