intel / multi_power_sequencerLinks
Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, such as dynamic adjustments and debug via PMBus, adjustable timing, power rail grouping, etc.
☆19Updated 3 months ago
Alternatives and similar repositories for multi_power_sequencer
Users that are interested in multi_power_sequencer are comparing it to the libraries listed below
Sorting:
- Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard☆44Updated 3 years ago
- Small footprint and configurable JESD204B core☆45Updated 2 months ago
- ☆113Updated 4 months ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- JESD204B core for Migen/MiSoC☆36Updated 4 years ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆69Updated 7 years ago
- This repository contains synthesizable examples which use the PoC-Library.☆38Updated 4 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆63Updated 3 weeks ago
- Extensible FPGA control platform☆62Updated 2 years ago
- A collection of phase locked loop (PLL) related projects☆107Updated last year
- This is a wiki and code sharing for ZYNQ☆74Updated 9 years ago
- Vivado build system☆69Updated 7 months ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated 2 years ago
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆35Updated 7 years ago
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆33Updated 8 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 7 years ago
- VHDL-2008 Support Library☆57Updated 8 years ago
- general-cores☆20Updated 3 weeks ago
- ☆86Updated 8 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆46Updated 9 years ago
- A tool for merging the MyHDL workflow with Vivado☆20Updated 5 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆36Updated last year
- SDK for FPGA / Linux Instruments☆102Updated 3 weeks ago
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆61Updated 4 months ago
- ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…☆57Updated this week
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆94Updated 5 years ago
- migen + misoc + redpitaya = digital servo☆40Updated 6 years ago
- Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130☆8Updated 2 months ago
- Wishbone to AXI bridge (VHDL)☆42Updated 5 years ago
- Python script to transform a VCD file to wavedrom format☆78Updated 2 years ago