intel / multi_power_sequencerLinks
Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, such as dynamic adjustments and debug via PMBus, adjustable timing, power rail grouping, etc.
☆19Updated 6 months ago
Alternatives and similar repositories for multi_power_sequencer
Users that are interested in multi_power_sequencer are comparing it to the libraries listed below
Sorting:
- Small footprint and configurable JESD204B core☆49Updated 2 weeks ago
- Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard☆44Updated 3 years ago
- Extensible FPGA control platform☆61Updated 2 years ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆66Updated 3 weeks ago
- ☆26Updated 2 years ago
- Vivado build system☆69Updated 10 months ago
- Python script to transform a VCD file to wavedrom format☆81Updated 3 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆52Updated 2 years ago
- ☆112Updated 7 months ago
- FPGA and Digital ASIC Build System☆78Updated this week
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- general-cores☆21Updated 3 months ago
- Framework Open EDA Gui☆69Updated 10 months ago
- JESD204b modules in VHDL☆30Updated 6 years ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆69Updated 8 years ago
- A collection of awesome MyHDL tutorials, projects and third-party tools.☆93Updated 4 years ago
- Open source AMD Xilinx Kria UltraScale+ SoM baseboard☆56Updated 9 months ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆41Updated 7 years ago
- Generate address space documentation HTML from compiled SystemRDL input☆57Updated last month
- An abstract language model of VHDL written in Python.☆57Updated this week
- A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite☆43Updated 6 years ago
- ☆56Updated 2 years ago
- ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…☆62Updated 3 weeks ago
- ☆30Updated 4 years ago
- ☆69Updated 3 months ago
- An open-source HDL register code generator fast enough to run in real time.☆74Updated this week
- Eclipse based IDE for RISC-V bare metal software development.☆20Updated 5 years ago
- FuseSoC standard core library☆147Updated 5 months ago
- Fork of OpenCores jpegencode with Cocotb testbench☆46Updated 10 years ago
- Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow☆90Updated 8 months ago